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ML7436N LSI

Hardware Design Manual

Issue Date: Jan. 19

th

2021

FEXL7436NDG-01

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Summary of Contents for LAPIS ML7436N

Page 1: ...ML7436N LSI Hardware Design Manual Issue Date Jan 19th 2021 FEXL7436NDG 01...

Page 2: ...Technology Products or the information contained in this document including but not limited to the Product data drawings charts programs algorithms and application examples etc Therefore LAPIS Technol...

Page 3: ...s regarding the information contained in this document or LAPIS Technology s Products 11 This document in part or in whole may not be reprinted or reproduced without prior consent of LAPIS Technology...

Page 4: ...ML7436N devices Hereafter ML7436N And also contains the measurement conditions and example of measurement results of RF characteristics Target product ML7436N The following related manual is availabl...

Page 5: ...wercase 103 1000 Milli m 10 3 Micro 10 6 Nano n 10 9 Second s lowercase Second Terminology H level Signal level on the high voltage side indicates the voltage level of VIH and VOH as defined in electr...

Page 6: ...7 1 2 Adjustment of LNA input impedance real part to 50 15 7 1 3 Adjustment of LNA input impedance imaginary part to 0 16 7 1 4 Connection to antenna 17 7 1 5 Reception matching value 17 7 2 SubGHz t...

Page 7: ...ltilayer ceramic capacitor to the RF_VBG 28 pin to reduce the noise from the band gap reference circuit 2 Crystal Oscillator circuit Figure 2 1 shows a configuration example of the crystal oscillator...

Page 8: ...oscillator circuit The capacitor s value of C1 C2 C3 and C4 depends on the crystal oscillator specification C1 C2 C3 and C4 should be placed as close as possible to the RF_XIN 1 the RF_XOUT 48 the CNI...

Page 9: ...applied to the RF_XOUT 48 pin A 100pF capacitor should be placed on the TCXO line as followingFigure 3 1 In ML7436N RF_XIN 1 pins is N C pin then it should be open It is necessary to turn TCXO off to...

Page 10: ...tions 5 Internal ADC ML7436N integrates a internal capacitor 20pF Typ that holds electric charge by ADC0 input voltage Connect more than 0 22uF capacitor when DC voltage level is measured with AD conv...

Page 11: ...ving transmission circuit as reference can maximize the power efficiency of transmission circuit Table 7 1 is the Measured RF impedance of each RF pins Table 7 1 Measured RF impedance of each RF pins...

Page 12: ...filter is adopted to remove the interfering wave At the transmission circuit DC voltage is biased at RF_REG_PA 32 pin through the choke coil of RF_PA_OUT1 33 pin It composes LPF Low Pass Filter and t...

Page 13: ...e Figure 7 2 is the measured value of the input impedance at RF_LNA_IN1 35 pin Figure 7 2 Measured input impedance The input impedance at the RF_LNA_IN1 35 can be expressed by the equivalent circuit t...

Page 14: ...of coupling capacitor Figure 7 4 shows that the connection of enough AC coupling capacitor Cac 100pF is connected to RF_LNA_IN1 pin RF_LNA_IN1 pin is biased to the stable DC voltage by the internal ci...

Page 15: ...f LNA input impedance real part to 50 Figure 7 5 shows the inductor Lmatch parallel connection It adjusts the LNA input impedance real part to 50 Figure 7 5 Addition of Lmatch The required inductance...

Page 16: ...lues convert input impedances to 1 50 jX 2 50 jX In case of 2 50 jX Lmatch is too large value it is difficult to adjust Lmatch value LAPIS technology recommends adopting 1 50 jX 7 1 3 Adjustment of LN...

Page 17: ...on 7 1 4 Connection to antenna Figure 7 9 shows the connection between antenna and the matching circuit The characteristic impedance is 50 Figure 7 9 Addition of the characteristic impedance 50 line 7...

Page 18: ...igher harmonics with T or type Chebyshev LPF Cz Lz Cz Figure 7 10 The cutoff frequency is approximately 1 5 times of the transmission frequency the ripple of passband is approximately 0 5dB the order...

Page 19: ...9 3 9 100 4 3 6 8 2 7 2 7 7 3 2 4GHz RF matching development procedure Figure 7 12 shows the example of the 2 4GHz RF matching circuit configuration The trap filter is configured to suppress the high...

Page 20: ...nics It is required to decide the maximum value of the higher harmonics and adjust the values meeting standards If necessary the trap filters are added to suppress every higher harmonic 7 3 2 Addition...

Page 21: ...dance is not 50 because the transmission character is prioritized over the reception character LAPIS technology tests the circuit with this impedance on the mass production process and confirm the min...

Page 22: ...with the trap filter suppressing the second the third harmonics and the matching circuit converting antenna load impedance to 50 Table 7 5 shows the matching circuit value Figure 7 16 2 4GHz RF match...

Page 23: ...pedance 50 8 2 Inductors Use inductors with high Q It is recommended to use LQW03AW series manufactured by Murata Manufacturing Co Ltd or equivalent Use inductors for the switching regulators that DC...

Page 24: ...D impedance Almost of L2 layer should be GND plane for double layerd board Figure 9 1 shows the ML7436N package figure The IC s back side GND PAD floats on the board The distance is 0 25mm Adjust the...

Page 25: ...o minimize the large current loop Mount inductor and capacitor close to IC and connect them with low impedance Mount the inductor L1 of the switching regulator and the transmission choke inductor L4 a...

Page 26: ...gn Fix REGPDIN 12 pin and TEST 39 pin to GND at the normal operation Fix RF_AMON 5 pin to OPEN When using TCXO fix RF_XIN 1 pin to OPEN Refer section 3 TCXO circuit When not using 2 4GHz band fix RF_L...

Page 27: ...ML7436N LSI Hardware Design Manual FEXL7436NDG 01 27 For DC DC For SubGHz band 420 440 860 870 920 930MHz For 2 4GHz band...

Page 28: ...GRM033 series 0603mm C19 1uF GRM033R61A105ME15E Murata Manufacturing GRM033 series 0603mm C20 100pF GRM0335C1H101JA01 Murata Manufacturing GRM033 series 0603mm C21 1 5pF GJM0335C1H1R5WB01 1 1pF GJM033...

Page 29: ...ML7436N LSI Hardware Design Manual FEXL7436NDG 01 29 Revision history Document No Date Page Content Previous New FEXL7436NDG 01 2021 1 19 The first edition...

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