AN092
© Kionix 2019 All Rights Reserved
11 July 2019
Page 21 of 27
3.8.
Activate Free-fall Engine
-
Write 0x00 to Control Register 1 (CNTL1) to set the accelerometer in stand-by mode.
Register Name
Address
Value
CNTL1
0x1B
0x00
-
Write 0x80 to Free-Fall Control Register (FFCNTL) to enable Free fall engine, to set Free-fall
interrupt latch control, count up/down debounce methodology, and the Output Data Rate
(ODR) to 12.5Hz (Default).
Register Name
Address
Value
FFCNTL
0x34
0x80
-
Write 0x08 to Free-Fall Threshold Register (FFTH) to set the Free-fall threshold to 0.5g based
on the following equation:
FFTH [counts] * 0.0625 [g/counts] = Free-fall Threshold [g]
8 [counts] * 0.0625 [g/count] = 0.5 [g]
Register Name
Address
Value
FFTH
0x32
0x08
-
Write 0x04 to Free-Fall Counter Register (FFC) to set the Free-fall delay detection to 0.320
sec. Note that the period of the free-fall counter is a function of Free-fall ODR set by
<OFFI2:OFF0> bits in FFCTNL register. The following equation can be used:
FFC [counts] / Free-Fall ODR [Hz] = Free-fall delay [sec]
4 [counts] / 12.5 [Hz] = 0.320 [sec]
Register Name
Address
Value
FFC
0x33
0x04
-
Write 0x30 to Interrupt Control Register (INC1) to output the physical interrupt of the
previously defined Free-fall detect function. This value will create an active high and latched
interrupt.
Register Name
Address
Value
INC1
0x22
0x30
-
Write 0x80 to Interrupt Control Register 4 (INC4) to set the Free-fall interrupt (FFI) to be
reported on physical interrupt pin INT1.
Register Name
Address
Value
INC4
0x25
0x80
