± 2g / 4g / 8g / 16g Tri-axis Digital
Accelerometer Technical
Reference Manual
PART NUMBER:
KX132-1211
Rev. 1.0
31-Jul-2019
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Ithaca, NY 14850
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2.4
Free fall Detect
The KX132-1211 features a Free fall interrupt that sends a flag through the INT1 or the INT2 output pins when the
accelerometer senses a Free fall event. The interrupt event is also reflected on the INT (bit 4) of the STATUS_REG
and FFS (bit 7) of the INS2 registers. A Free fall event is evident when all three accelerometer axes simultaneously fall
below a certain acceleration threshold for a set amount of time. The KX132-1211 gives the user the option to define the
acceleration threshold value through the FFTH 8-bit register where 256 counts cover the g range of the accelerometer.
This value is compared to the top 8 bits of the accelerometer 8g output value (independent of the actual g-range setting
of the device). Equation 8 shows how to calculate the FFTH register value for a desired Free fall threshold. The threshold
of 0.5g is a good starting point.
FFTH (counts) = Free fall Threshold (g) x 16 (counts/g)
Equation 8:
Free fall Threshold
Through the Free Fall Counter (FFC), the user can set the amount of time all three accelerometer axes must
simultaneously remain below the FFTH acceleration threshold before the Free fall interrupt flag is sent through the INT1
or the INT2 output pins. This delay/debounce time is defined by the available 0 to 255 counts, which represent
accelerometer samples taken at the Free fall ODR defined by OFFI<2:0> bits in the FFCNTL register. Every count is
calculated as 1/ODR delay period. Equation 9 shows how to calculate the FFC register value for a desired Free fall
delay. The delay of 0.32 sec is a good starting point.
FFC (counts) = Free fall delay (sec) x Free fall ODR (Hz)
Equation 9:
Free fall Threshold
When the Free fall interrupt is enabled the part must not be in a physical state that would trigger the Free fall interrupt,
or the delay will not be correct for the present Free fall.
