Technical Note
18/19
BU7963GUW
www.rohm.com
2010.04 - Rev.A
© 2010 ROHM Co., Ltd. All rights reserved.
●
Application Circuit Example
Pixel clock
R[7:0],G[7:0],B[7:0],
HS,VS,DE
27
Rese
t
XS
D
CLK+
CLK-
D0+
D0-
D1+
D1-
CLK+
CLK-
D0+
D0-
D1+
D1-
PD[26:0]
PCLK
XS
D
Rese
t
R[7:0],G[7:0],B[7:0],
HS,VS,DE
PCLK
PD[26:0]
Pixel clock
Video Mode
LCD Controller
WVGA
LCD panel
BU79
63GUW
（
Tx dev
ic
e
）
BU79
64GUW
（
Rx de
vi
ce
）
MPU
PLLBW
LS1
RVS
TEST[1:0]
DRVR
DVD
D
DGND
MSGND
10
K
Ω
±5
%
DRVR
MSGND
10
K
Ω
±5
%
27
PLLBW1
PLLBW0
LS1
F_XS
TEST[1:0]
DGND
DVDD
MS
G
N
D
M
SVDD
DVDD
DG
N
D
100p×2
0.1
μ
×2
MS
G
N
D
MS
VD
D
100p×3
0.1
μ
×3
DV
D
D
DG
N
D
1.8V 1.8V
1.8V
GND
1.8V
GND
CKD
CPO
D2+
D2-
D2+
D2-
100p×3
0.1
μ
×3
100p×2
0.1
μ
×2
1.8V
1.8V
LS0
LS0
POL_PCLK
Fig.17. Application circuit
●
PCB Layout for MSDL3
The following points should be considered about the wiring for PCB of MSDL3.
･
Wire for the PCB wiring pattern of high-speed channel (CLK, D0+/-, D1+/-, D2+/-) as short as possible.
･
The PCB wiring for high-speed channel must not use the through-hole.
･
Do not bend the wiring for high-speed channel squarely.
･
Make the wiring length of each high-speed channel the same length (within 0.5mm).
