Technical Note
8/30
BD5446EFV
www.rohm.com
2010.05 - Rev.B
© 2010 ROHM Co., Ltd. All rights reserved.
No.
Pin name
Pin voltage
Pin explanation
Internal equivalence circuit
7
8
9
10
11
SYS_CLK
BCLK
LRCLK
SDATA1
SDATA2
0V
Digital audio signal input pin
12 RESETX
0V
Reset pin for Digital circuit
H: Reset OFF
L: Reset ON
13 MUTEX
Speaker output mute control pin
H: Mute OFF
L: Mute ON
14
PDX
Power down control pin
H: Power down OFF
L: Power down ON
15 IIS_LJ
0V
Digital audio signal data format setting terminal
H: Left Justified format
L: I
2
S format
16
17
18
GAIN1
GAIN2
GAIN3
0V
Gain setting terminal
Gain=20dB~34dB, 2dB step
19
20
TEST1
TEST2
0V
Test pin
Please connect to GND.
21 SEL_DAC
0V
DAC output selection terminal
H: SDATA2 is output from the DAC
L:
SDATA1 is output from the DAC
5
7,8,9
10,11
6
50K
5
12,13,14
6
50K
5
6
15
50K
5
16,17,18
6
50K
5
19,20
6
50K
5
6
21
50K
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