Interface description
R&S
®
TS-PMB
28
User Manual 1153.5233.12 ─ 06
Pin
F
E
D
C
B
A
Z
22
GA0
GA1
GA2
GA3
GA4
21
PXI_LBR3
PXI_LBR2
PXI_LBR1
GA5
PXI_LBR0
20
PXI_LBL1
GND
PXI_LBL0
AUX1
AUX2
19
AUX1
AUX2
PXI_LBL3
GND
PXI_LBL2
18
PXI_TRIG6
GND/NC*1)
PXI_TRIG5
PXI_TRIG4
PXI_TRIG3
17
PXI_CLK10
AUX4
AUX3
GND
PXI_TRIG2
16
PXI_TRIG7
GND
AUX5
PXI_TRIG0
PXI_TRIG1
15
+5V
+5V
AUX6
GND
14
NC
NC
13
NC
NC
12
NP
LABA1
LABC1
NP
11
NP
IL1
NP
10
NC
LABB1
LABD1
NC
9
NC
IL3
NC
8
NC
LABA2
LABC2
NC
7
NC
IL2
NC
6
NC
LABB2
LABD2
NC
5
NC
NC
Pin
F
E
D
C
B
A
Z
4
NC
NC
3
RSA0
RRST#
+12V
GND
RSD0
2
+12V
RSDI
RSA1
+5V
RSCLK
1
+5V
CAN_L
CAN_H
GND
RCS#
X20
C
O
N
N
E
C
T
O
R
Rear IO
Rear IO incompatible PXI
PXI signals
R&S rear IO control (SPI)
GA3..0 at GND or N.C.
GS5..4 at jumper field, GA5 only R&S PowerTSVP
High voltage, incompatible PXI
*1) N.C. only in V2.14 (special requirement for use in R&S CompactTSVP backplane V4.x,
additionally rear-IO-module TS-PRIO required)
Figure C-3: X20 Pinning Schedule (Version 2.X)
Pin
F
E
D
C
B
A
Z
22
GA0
GA1
GA2
GA3
GA4
21
GA5
20
GND
AUX1
AUX2
19
AUX1
AUX2
GND
-12V
18
PXI_TRIG6
GND/CAN_EN in V3.0
PXI_TRIG5
PXI_TRIG4
PXI_TRIG3
17
PXI_CLK10
GND
PXI_TRIG2
16
PXI_TRIG7
GND
PXI_TRIG0
PXI_TRIG1
15
+5V
+5V
GND
14
NC
NC
13
NC
NC
12
NP
LABA1
LABC1
NP
11
NP
IL1
NP
10
NC
LABB1
LABD1
NC
9
NC
IL3
NC
8
NC
LABA2
LABC2
NC
7
NC
IL2
NC
6
NC
LABB2
LABD2
NC
5
NC
NC
Pin
F
E
D
C
B
A
Z
4
NC
NC
3
RSA0
RRST#
GND
RSD0
2
+12V
RSDI
RSA1
RSCLK
1
+5V
CAN_L
CAN_H
GND
RCS#
X20
C
O
N
N
E
C
T
O
R
Figure C-4: X20 Pinning Schedule (Version 3.X)
C.3
Connector X1
R&S TS-PMB modules version 3.x or higher are equipped with this connector. Starting
at serial no. 100183 (first delivery in 2004).
Connector X1