BMD-200 Evaluation Kit User Guide
August 10, 2016
BMD-200-EVAL-UG-V1.4
Page 19 of 20
6.
BMD-200 Pinout
Top View
Figure 19 – BMD-200 Pin-out
Pin description
Name
Pin
Direction
Description
P0.24
5
In/Out
GPIO
P0.25
6
In/Out
GPIO
P0.26
8
In/Out
GPIO/AIN1/XTAL2 (32.768kHz)
P0.27
9
In/Out
GPIO/AIN0/XTAL1(32.768kHz)
P0.00
11
In/Out
GPIO/AREF0
P0.01
12
In/Out
GPIO/AIN2
P0.02
13
In/Out
GPIO/AIN3
P0.03
14
In/Out
GPIO/AIN4
P0.04
15
In/Out
GPIO/AIN5
P0.05
16
In/Out
GPIO/AIN6
P0.06
17
In/Out
GPIO/AIN7/AREF1
P0.08
20
In/Out
GPIO
P0.09
21
In/Out
GPIO
P0.10
22
In/Out
GPIO
P0.11
23
In/Out
GPIO
SWDIO
24
In/Out
SWD IO/
RESET
̅̅̅̅̅̅̅̅̅
SWCLK
25
In
SW Clock
1
VCC
18
Power
+2.1 to +3.6VDC input
2
GND
1, 2, 3, 4, 7, 10, 19,
26, (27, 28 opt.)
Power
Electrical Ground
Note 1: SWDCLK has an internal 12 kΩ pull-down resistor.
Note 2: An external capacitor for V
CC
is not strictly required, however using a 1µF - 4.7µF
ceramic capacitor is recommended.
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