RZ/A2M CPU Board RTK7921053C00000BE
2. Function specifications
R20UT4397EJ0100 Rev.1.00
2-18
2018.10.11
2.3.3
HyperMCP
RTK7921053C00000BE is equipped with HyperMCP x 1 shown in Table 2.3.3 as a default installation. HyperMCP is
controlled by the HyperBus controller. During boot (boot mode 7), data (programs) can be read from the HyperFlash in
HyperMCP.
Moreover, jumper JP2 is set to supply power to PVcc_HO and HyperMCP. Please be sure to set voltage to 1.8V.
Figure 2.3.2 shows HyperMCP block diagram. Moreover, Table 2.3.4 displays jumper JP2 function setting table.
Table 2.3.3
HyperMCP Overview
Memory
types
Type name
RZ/A2M Connect with
interface
Operational
voltage
capacity
package
HyperMCP
S71KS512SC0BHV000
HyperBus controller
1.8V
HyperFlash: 64MB
HyperRAM: 8MB
24 ball BGA
Figure 2.3.2
HyperMCP Block Diagram
Table 2.3.4
Function Settings for Jumper JP2
Jumper
1-2
2-3
JP2
Supplies 3.3V to PVcc_HO and HyperMCP.
(Setting prohibited)
Supplies 1.8V to PVcc_HO and HyperMCP.
(Initial setting)
[Note] shows the setting function to select.
If jumper JP2 is errorneously set, memory may be damaged. Pay full attention to the settings.
RZ/A2M (U1)
HM_CK
/OM_SCLK
DS
16
HM_RWDS
/OM_DQS
HM_CS0#
/OM_CS0#
CLK
CS0#
D[7:0]
HM_DQ[7:0]
/OM_SIO[7:0]
PH4 /
HM_INT#
INT#
D[7:0]
CLK
CS0#
DS
PH3 /
HM_RSTO#
RSTO#
HyperMCP (U3)
DQ[7:0]
CK
RWDS
CS1#
RESET#
VccQ
Vcc
INT#
RTSO#
HM_CS1#
/OM_CS1#
CS1#
CS1#
CS2#
RAMVcc
RAMVcc
PVcc_HO
RAMVcc
HM_RESET#
/OM_RESET#
3.3V
3.3V
RESET#
RESET#
RAMVcc
HM_CK#
CLK #
CLK#
CK#
Note:
Red characters
indicate
function s in use.
:
Unmounted .
INT#
RSTO#
RAMVcc
RAMVcc
3.3V
1.8V
RAMVcc
1
3
JP2