RX72M Group
Single-Chip Motor Control via EtherCAT Communications
R01AN5434EJ0110 Rev.1.10
Page 9 of 85
Aug.31.2020
Table 2-3 EtherCAT Communications Related Pin Interface (2)
Pin Name
Description
PN1/CAT1_ETXD3
4-bit transmit data output (bit 3)
PQ5/CAT1_ETXD0
4-bit transmit data output (bit 0)
PN0/CAT1_ETXD2
4-bit transmit data output (bit 2)
PQ6/CAT1_ETXD1
4-bit transmit data output (bit 1)
P11/CATSYNC1
SYNC1 signal output
PM6/CAT0_TX_CLK
Transmit clock input
PK0/CAT0_MDC
Management data clock output
P34/CAT0_LINKSTA
Link status input from the PHY-LSI
P82/CATI2CDATA
EEPROM I2C data input/output
Table 2-4 Other Pin Interface
Pin Name
Description
P12/RXD2
SCI2 receive data input pin
P13/TXD2
SCI2 transmit data output pin
PH2
Device ID DIP SW (bit 0)
PQ3
Device ID DIP SW (bit 1)
P05
Device ID DIP SW (bit 2)
P72
Device ID DIP SW (bit 3)
PC1
Device ID DIP SW (bit 4)
PN5
Device ID DIP SW (bit 5)