μ
PD720231
7.
How to Connect to External Elements
R19UH0094EJ0100 Rev 1.00
Page 26 of 30
Mar 1, 2013
7.3
RREF Connection
Figure 7-2. RREF Connection
Remark
The board layout should minimize the total path length from RREF through the resistor to GND
and path length to GND. GND must be stable.
Due to analog sensitivity, 1.60 K within
±
1% must be used, and two or more resistors in series or
parallel should not be used in place of a single 1.60 K resistor.
7.4
Crystal Connection
Figure 7-3. Crystal Connection
The following crystal is evaluated on our reference design board. Table 7-2 shows the external parameters.
Table 7-2. External Parameters
Vendor Crystal
R
C1
C2
NDK NX2520SA,
30MHz
100
Ω
12 pF
12 pF
Remark
Clock shall be 30 MHz within 100ppm. Moreover optimal crystal
parameters and RC component values may be affected by the PCB
layout.
µPD720231
RREF
GND
1.6 Kohm ± 1%
µPD720231
XT1
XT2
R
Crystal
C2
C1
