Renesas M32R-FPU, Software Manual

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1
1-11 M32R-FPU Software Manual (Rev.1.01)
CPU PROGRAMMING MODEL
1.4 Accumulator
1.4 Accumulator
The Accumulator (ACC) is a 56-bit register used for DSP function instructions.
The accumulator is handled as a 64-bit register when accessed for read or write.
When reading data from the accumulator, the value of bit 8 is sign-extended. When
writing data to the accumulator, bits 0 to 7 are ignored. The accumulator is also used
for the multiply instruction "MUL", in which case the accumulator value is destroyed
by instruction execution.
Use the MVTACHI and MVTACLO instructions for writing to the accumulator. The
MVTACHI and MVTACLO instructions write data to the high-order 32 bits (bits 0-31)
and the low-order 32 bits (bits 32-63), respectively.
Use the MVFACHI, MVFACLO, and MVFACMI instructions for reading data from the
accumulator. The MVFACHI, MVFACLO and MVFACMI instructions read data from
the high-order 32 bits (bits 0-31), the low-order 32 bits (bits 32-63) and the middle 32
bits (bits 16-47), respectively.
At reset release, the value of accumulator is undefined.
32 48 b63 31 16 15 b0 47 7 8
ACC
(Note 1)
read/write range with
MVTACLO or MVFACLO instruction
read/write range with
MVTACHI or MVFACHI instruction
read range with MVFACMI instruction
1.5 Program Counter
The Program Counter (PC) is a 32-bit counter that retains the address of the
instruction being executed. Since the M32R CPU instruction starts with even-
numbered addresses, the LSB (bit 31) is always "0".
At reset release, the value of the PC is "H’0000 0000."
PC
PC
0
b31 b0
Note 1: When read, bits 0 to 7 always show the sign-extended value of bit 8. Writing to this bit field is
ignored.