M30870T2-CPE User’s Manual
3. Usage (Emulator Debugger)
REJ10J0766-0400 Rev.4.00 February 16, 2006
2. Trace window (bus display)
Bus display
Explanation of the trace window (bus
display)
The following explains the displayed contents, from left to
right.
- Address
Shows the status of the address bus.
- Data
Shows the status of the data bus.
- BUS
Shows the width of the external data bus. In the present
emulator, only “16b” for 16 bits wide bus is displayed.
- BHE*
Shows the status (0 or 1) of the BHE (Byte High Enable)
signal. If this signal = 0, the odd-address data is valid.
- BIU
Shows the status between the BIU (Bus Interface Unit)
and memory or I/O.
Symbol Status
–
: No change
WAIT : Executing the wait instruction
RBML : Read (bytes) ML on
F :
Fetch
QC :
Discontinuous
fetch
RWML : Read (words) ML on
INT
: Interrupt acknowledge cycle
RB
: Read (bytes)
WB :
Write
(bytes)
DRB
: Read (bytes) by DMA
DWB
: Write (bytes) by DMA
RW
: Read (words)
WW :
Write
(words)
DRW
: Read (words) by DMA
DWW : Write (words) by DMA
- R/W
Shows the status of the data bus.
Displayed as “R” for Read, “W” for Write, and “–” for
no access.
- RWT
This is the signal to indicate a valid bus cycle. When
valid, RWT = 0. The Address, Data, and the BIU signals
are effective when this signal is 0.
- CPU
Shows the status between the CPU and BIU (Bus
Interface Unit).
- OPC
Shows the op-code size in the read data.
- OPR
Shows the code size except op-code.
Disassemble display
Source display
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Summary of Contents for M30870T2-CPE
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