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H8S Family 

LCD Display Using 1/4 Duty Drive (LCD Controller/Driver) 

REJ06B0486-0100/Rev.1.00 

March 2005 

Page 14 of 19 

Table 4  Internal Registers Used (cont) 

Register 

Bit Name 

Description 

Address 

Set Value

LCR2 

LCD control register 2 

H'FFFFC2 

H'00 

 

LCDAB 

A waveform/B waveform switching control 
Specifies whether the A waveform or B waveform is 
used as the LCD drive waveform. 

• 

LCDAB = 0: Drive using the A waveform 

• 

LCDAB = 1: Drive using the B waveform 

Bit 7 

 

HCKS 

Triple step-up voltage circuit clock select 
Selects the clock used for the triple step-up voltage 
circuit. This bit selects a clock which is equivalent to 
the clock specified by the LCD operating control 
register (LCR) divided by 4 or 8 as the step-up voltage 
circuit clock. 

• 

HCKS = 0: Clock equivalent to LCD operating clock 
divided by 4 selected as step-up voltage circuit 
clock 

• 

HCKS = 1: Clock equivalent to LCD operating clock 
divided by 8 selected as step-up voltage circuit 
clock 

Bit 5 

 

SUPS 

Drive power select, triple step-up voltage circuit control
The triple step-up voltage circuit stops operating when 
V

CC

 is selected as the drive power supply. The triple 

step-up voltage circuit starts operating when the LCD 
input reference voltage (VLCD3) is selected as the 
drive power supply. 

• 

SUPS = 0: Drive power supply is V

CC

, triple step-up 

voltage circuit halts 

• 

SUPS = 1: Drive power supply is triple step-up 
voltage of the LCD input reference voltage 
(VLCD3); triple step-up voltage circuit operates 

Bit 4 

 CDS3 

CDS2 
CDS1 
CDS0 

Selection of duty cycle for charge/discharge pulse 
Selects the duty cycle for periods when the power 
supply divider resistance is connected to the power 
supply circuit. A duty cycle of 0 specifies a fixed state 
in which the power supply divider resistance is 
separated from the power supply circuit. Therefore, it 
is necessary to supply power to pins V1, V2, and V3 
from an external circuit. 

• 

CDS3 = 0, CDS2 = 0, CDS1 = 0, CDS0 = 0: Duty 
cycle = 1 

Bit 3 
Bit 2 
Bit 1 
Bit 0 

CDS3 = 0
CDS2 = 0
CDS1 = 1
CDS0 = 1

MSTPCRD 

Module stop control register D 

H'FFFF60 

H'BF 

 MSTPD6 

• 

MSTPD6 = 0: LCD controller/driver module stop 
mode cleared 

• 

MSTPD6 = 1: LCD controller/driver module stop 
mode set 

Bit 6 

 
(4) RAM Usage 

No RAM is used in this sample task. 

 

Summary of Contents for H8S series

Page 1: ...ok over all the business of both companies Therefore although the old company name remains in this document it is a valid Renesas Electronics document We appreciate your understanding Renesas Electron...

Page 2: ...t for an application categorized as Specific or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics The quality grade of each Renesas...

Page 3: ...Driver Introduction The segment type LCD is turned on and off by 1 4 duty drive using the LCD controller driver and the power supply circuit Target Device H8S 2268 Contents 1 Specifications 2 2 Functi...

Page 4: ...controller circuit and LCD driver circuit of the H8S 2268 to display information on an LCD module 2 Four common signals and 16 segment signals are used for 1 4 duty display 3 A sample LCD module conn...

Page 5: ...river 40 SEG LCD RAM capacity 8 bits 20 bytes 160 bits Byte or word access to LCD RAM is supported The segment output pins can be used as ports in groups of eight In the static mode and with 1 2 duty...

Page 6: ...CR LCD port control register LCR LCD control register LCR2 LCD control register 2 LCD drive power supply built in step up voltage circuit Common driver Common data latch Segment driver 40 bit shift re...

Page 7: ...ty these pins can be used in parallel LCD power supply pins V1 V2 V3 These pins are used when the H8S 2268 is connected to a bypass capacitor and an external power supply is used The V3 pin functions...

Page 8: ...SEG35 SEG37 SEG39 bit2 SEG1 SEG3 SEG5 SEG7 SEG9 SEG11 SEG13 SEG15 SEG17 SEG19 SEG21 SEG23 SEG25 SEG27 SEG29 SEG31 SEG33 SEG35 SEG37 SEG39 bit1 SEG1 SEG3 SEG5 SEG7 SEG9 SEG11 SEG13 SEG15 SEG17 SEG19 S...

Page 9: ...he corresponding values set in the LCD RAM is shown in figure 6 As shown in figure 6 a setting of 1 for a bit in LCD RAM for a segment from 0 to 7 causes the corresponding segment to display and a set...

Page 10: ...0 0 H 00 H FFFC4A 0 0 1 0 0 0 0 0 H 20 H FFFC4A 0 0 0 0 1 0 0 0 H 08 0 H FFFC4A 1 1 0 1 0 1 1 1 H D7 1 H FFFC4A 0 0 0 0 0 1 1 0 H 06 2 H FFFC4A 1 1 1 0 0 0 1 1 H E3 3 H FFFC4A 1 0 1 0 0 1 1 1 H A7 4 H...

Page 11: ...Performs LCD power supply on off control display function activation control display data control and frame frequency selection LCR2 Controls switching between the A and B waveforms selects the clock...

Page 12: ...s The software settings for implementing LCD display are described below a Selecting the Duty Cycle and Common Function The DTS1 and DTS0 bits are used to select the duty cycle setting from among stat...

Page 13: ...inciples of Operation The principles of operation of this sample task are illustrated in figure 7 COM1 COM2 COM3 COM4 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG2...

Page 14: ...H C3 DTS1 DTS0 Duty cycle select 1 and 0 The combination of DTS1 and DTS0 selects static mode or 1 2 1 3 or 1 4 duty DTS1 1 DTS0 1 1 4 duty selected Bit 7 Bit 6 DTS1 1 DTS0 1 CMX Common function selec...

Page 15: ...plit resistors are connected to VCC Bit 6 0 ACT Display function activate This bit specifies whether or not the LCD controller driver is used Clearing this bit to 0 halts operation of the LCD controll...

Page 16: ...e circuit control The triple step up voltage circuit stops operating when VCC is selected as the drive power supply The triple step up voltage circuit starts operating when the LCD input reference vol...

Page 17: ...ent driver All cleared LCR H 31 Separate LCD power supply split resistors from VCC Operate LCD controller driver Display LCD RAM data Use SUB 2 as clock source Frame 64 Hz LCR2 H 00 Select A waveform...

Page 18: ...xternal Clock 10MHz Internal Clock 10MHz Sub Clock 32 768kHz include machine h Symbol Definition define LPCR volatile unsigned char 0xFFFC30 LCD Port Control Register define LCR volatile unsigned char...

Page 19: ...ed LCD RAM LCD RAM for i 0 i 20 i Initialize LCD RAM LCD RAM i 0 LCD RAM LCD RAM 0x00000A Set LCD RAM Address LPCR 0xC3 1 4 Duty SEG40 SEG17 ON LCR 0x31 LCD ON Phi_sub 2 LCR2 0x00 A waveform Drive pow...

Page 20: ...8S Family LCD Display Using 1 4 Duty Drive LCD Controller Driver REJ06B0486 0100 Rev 1 00 March 2005 Page 18 of 19 Revision Record Description Rev Date Page Summary 1 00 Mar 09 05 First edition issued...

Page 21: ...e be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products Renesas Technology Corp assumes no responsibility for any da...

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