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Note on Reset Input from the Target System:
• If a reset is input from the target system, when a user program is being executed (when the RUN
status LED on the PC4701's front panel is lit), the user program is stopped.
IMPORTANT
Notes on the Target System:
• As pin Vcc of emulator is connected to the target system to observe the voltage of the target system,
the target system is not powered by the emulator. Therefore design your system so that the target
system is powered separately.
• The voltage of the target system should be within the range of the MCU specification and +3.0 to
+3.6 V or +4.5 to 5.25 V.
• Do not change the voltage of the target system after turning on the power.
• Before powering on your emulator system, check that the host machine, the emulator main unit,
the converter board and target system are all connected correctly. Next, turn on the power to each
equipment following the procedure below.
(1) Turn ON/OFF the target system and the PC4701 emulator as simultaneously as possible.
(2) When the PC4701 and emulator debugger start up, check the target status LEDs on the
emulator main unit's front panel to see if this product is ready to operate.
(For the target status LEDs on the front panel when starting up the PC4701, refer to "4.1 (3)
LED Display When the PC4701 Starts Up Normally" on page 39)
Note on SYNCOUT Output:
• When using the emulator, SYNCOUT signals are not output.
Note on RDY Input:
• Be sure to input "L" to pin RDY* of the target system during the user program execution. Inputting
"L" to pin RDY* while the user program is stopped may cause a malfunction of the emulator.
Note on HOLD Input:
• Be sure to input "L" to pin HOLD* of the target system during the user program execution. Inputting
"L" to pin HOLD while the user program is stopped may cause a malfunction of the emulator.
Summary of Contents for Emulation Pod M37641T2-RPD-E
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Page 45: ...43 68 Figure 4 4 Self check procedure...
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Page 50: ...48 68 Figure 5 2 Connection diagram 2 2...
Page 55: ...53 68 Figure 5 3 Bus timing 1 2...
Page 56: ...54 68 Figure 5 4 Bus timing 2 2...
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