Publication No. REF-000-009-R00
Red Rapids
Page 4
2.3 DC Offset Adjustment (DC-Coupled units only)
The DC-coupled receiver option contains a set of DACs to trim larger DC offset errors
that are induced by the coupling amplifier and system DC mismatch. A block diagram
of the trim DAC structure is shown in Figure 2-3. The DC offset trimming function is
implemented using a dual DAC in a push-pull configuration. The polarity control for
the offset is different between channel 1 and 2 due to layout constraints. In channel 1
trim DAC A controls positive offset while DAC B controls negative offset. Channel 2
has the opposite structure. DAC B offsets the ADC input voltage in a positive direction
while DAC A offsets the ADC input in a negative direction. Trim DAC register settings
can be found in the device data sheet listed in section 5.0. The receiver trim DACs are
accessed through the Control Interface via a SPI bus as shown in Figure 2-4.
Only one of the pair of offset trim DACs per input should be
active at a time. The unused trim DAC should be set to 0 V.
Analog
Input
DACA
DACB
+
-
Control Interface
ADC
GND
Trim DAC
pos
neg
Analog
Input
DACB
DACA
+
-
Control Interface
ADC
GND
Trim DAC
pos
neg
Channel 1 DC Offset Adjustment
Channel 2 DC Offset Adjustment
Figure 2-3 Trim DAC Operation in DC-Coupled Build Option
