Raspberry Pi A, User Manual, Page: 134 / 314

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P A R T I
C O N N E C T I N G T H E B O A R D
As an example, the following lines entered into
config.txt
will give the BCM2835 a small
boost of 0.05 V to 1.25 V and the memory chip a bigger boost of 0.1 V to 1.3 V:
over_voltage=2
over_voltage_sdram=4
As with other settings, deleting the lines from
config.txt
or deleting the file itself will
return things to normal. Unlike the other settings in this section, however, the evidence will
remain in the form of a blown fuse in the BCM2835, rendering the Pi’s warranty null and
void even after the default settings are restored.
Disabling L2 Cache
The Pi’s BCM2835 SoC processor has 128 KB of Layer 2 cache memory onboard. Although
this memory is small, it’s extremely fast. It’s used to temporarily store—or cache— data
and instructions between the slower main memory and the processor itself to improve
performance.
Because of the BCM2835’s origins as a multimedia processor targeted at set-top boxes, this
L2 cache is designed to be used by the GPU portion of the chip alone. Unlike a traditional
processor, the CPU doesn’t have any L2 cache of its own.
Using
config.txt
, you can tell the BCM2835 to allow or disallow its CPU portion access to
the L2 cache memory. In some cases, this can improve performance. In other cases it can
harm performance, due to the physical location of the cache being a relatively long distance
away from the CPU section of the chip and closer to the GPU.
Use of the L2 cache memory also requires a Linux distribution that has been compiled with
the cache memory in mind. Raspbian is one such distribution, and comes with the L2 cache
enabled for improved performance. It should be left this way, and only disabled if it causes
problems with alternative operating systems.
To switch the L2 cache off for CPU access, simply add the following line to the
config.txt
file:
disable_l2cache=1
As with all
config.txt
settings, the system must be rebooted before the change will take
place. To enable the CPU’s access to the cache memory, replace the
1
with a
0
.