Ramix PMC551 Hardware Reference And Installation Manual Download Page 9

Rx-URME-031     Rev -

- DRAFT - 

PMC551 Hardware Reference and Installation Manual

Page 9

5.1.2

BAR0

BAR0 is used to determine the size of the memory actually on the PMC551 in the system, and to
assign the base PCI address of the region that the PMC551 will occupy. 

Memory sizing follows the PCI specification:

Write all 1’s to the register

Read back

On the reading a mask is returned in which all address bits that are NOT decoded by the PMC551
are returned as set.  (Example: on a PMC551 configured for 32Mbyte the return value will be:
0xFE000000).

Once the memory size is determined the base address value is set.

Note: On most systems, this function is automatically performed by the BIOS or other power on

initialization.  Care must be exercised when modifying this register.  Prior to altering the value,
ensure that the Memory Enable (bit 1 in the CMD/STS register) is zero.

5.2

Waking up Memory

After power up, prior to accessing the memory on the PMC551, a “wakeup” procedure must be
executed.  The following code fragment documents the necessary interactions.  The procedures
prefixed with “pci_” should be implemented or replaced as appropriate for the local software
environment.

27..29

Reserved

30

System Error. Set to 1 in response to system error detected by PMC551. Write 1 to clear

31

Parity Error. Set to 1 in response to parity error. Write 1 to clear

Bit(s)

Function

0

0 - Indicates memory space address

1..2

Address range type. Not used by PMC551

3

 Prefetch Enable. Set to enable prefetch. Should be set for best performance.

4..19

Reserved

20..31

Base Address

Summary of Contents for PMC551

Page 1: ...Hardware Reference and Installation Manual 1672 Donlon Street Ventura California 93003 U S A Tel 805 650 2111 FAX 805 650 2110 Customer Support E mail support ramix com Document ID Rx URME 031 Revisi...

Page 2: ...rn or Enter depending on your keyboard CTRL X While you hold down the Ctrl key press any other key RAMiX monitor commands are case sensitive You must enter commands in the correct case as printed in t...

Page 3: ...s can be critical in high performance data acquisition systems 1 2 FEATURES The PMC551 complies with the CMC specification for PCI Mezzanine Cards As such it will directly connect to any Single Board...

Page 4: ...odule from shipping carton Check and verify that all items are present by referring to the packing list 2 2 1 Included Items Each PMC551 is shipped with the following items PMC551 PMC Assembly 2 3 Han...

Page 5: ...e below 1 Remove the four screws from bottom of the stand offs of the PMC551 2 Line up the J1 J2 on the host PCB to PMC551 J1 J2 3 Push the PMC551 down make sure the connectors J1 and J2 are positione...

Page 6: ...Rx URME 031 Rev DRAFT PMC551 Hardware Reference and Installation Manual Page 6 3 Front Panel Indicators PMC551 Front Panel ACT PMC551...

Page 7: ...This requires performing a sequence of PCI configuration transfers see the Programming Notes section for details 4 1 2 PCI Interface The PCI interface on the PMC551 is fully compliant with the PCI 2 1...

Page 8: ...is is a combination of several smaller registers This approach is taken for simplicity access in smaller i e 8 or 16 bit transfers is supported as documented in the PCI 2 1 specification 5 1 1 Command...

Page 9: ...he BIOS or other power on initialization Care must be exercised when modifying this register Prior to altering the value ensure that the Memory Enable bit 1 in the CMD STS register is zero 5 2 Waking...

Page 10: ...fig_word dev PMC551_SDRAM_MA 0x0400 pci_write_config_word dev PMC551_SDRAM_CMD 0x00bf do pci_read_config_word dev PMC551_SDRAM_CMD cmd while PMC551_COMMAND_DONE cmd for i 1 i 8 i pci_write_config_word...

Page 11: ...S SPECIFICATIONS DRAM Memory Subsystem up to 512Mbyte Compatibility IEEE802 3z Standard Single PMC Interface PCI 33Mhz 32bit PCI Revision 2 2 Size IEEE1386 Standard Single PMC Drivers VxWorks pSOS Lyn...

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