Ramix PMC551, Hardware Reference And Installation Manual, Page: 8 / 11

Rx-URME-031 Rev -
- DRAFT - PMC551 Hardware Reference and Installation Manual
Page 8
5 Programming Notes
The PMC551 PCI Interface will respond to PCI configuration cycles upon power-up and PCI
Memory cycles, when enabled. The Configuration Space registers include the standard PCI
header as well as a number of PMC55 specific registers. (The latter are all in the device-specific
address range as provided for in the PCI specification). These latter registers are used after
power on to “wake up” the memory. A detailed description of the registers is not provided, as no
modification of the sequence is supported.
5.1 Standard PCI Configuration Header
The full set of PCI configuration registers is included in the PCI header, but only a subset are
relevant to the operation of the PMC551. As it is only a PCI target, none of the bus master
registers will be effective (e.g., Latency Timer). In the following tables registers are presented as
32 bit values; in some cases this is a combination of several smaller registers. This approach is
taken for simplicity, access in smaller (i.e., 8 or 16 bit) transfers is supported as documented in the
PCI 2.1 specification.
5.1.1 Command Status Register
This register is used to enable memory response of the PMC551 and report
Offset Description Default Value
0x0 Device/Vendor ID 0x100011B0
0x4 Command Status Register 0x00000000
0x8 Revision/Class 0x05800000
0xC Unused on PMC551 0x00000000
0x10 BAR0 (PCI Base Address) 0x00000000
0x14 BAR1 (Unused) 0x00000000
0x18 BAR2 (Unused)
0x1C BAR3 (Unused)
0x20 Reserved
0x24 Reserved
0x28 Reserved
0x2C SubVendor Device/ SubVendor ID 0x0551140B
Bit(s) Function
0 Not implemented
1
Memory Enable - When set allows PMC551 to respond to PCI transfers. Must be set after
programming BAR0 to allow access to the FailOver firmware
2..5 Reserved
6 Parity Enable. Set to 1 to report cause PMC551 to report parity errors
7 Reserved
8
System Error Enable. When 1 the PMC551 will also assert SYSERR when reporting a parity
error
9..22 Unused
23 Fast Back to Back. PMC551 will always correctly respond to fast back to back cycles
24 0
25..26 Device Select timing. Read Only