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Instruction Manual 7064R-S-1844
General Description 1-2
General
Description
The 7064R-S-1844 is a register based Dual 18 BIT 1MHz DAC VXI
Module.
The 7064R-S-1844 interface logic maps the internal registers of the
ADC modules to the VXI A24 Address space. All transfers to and
from the ADC models are full 32 bit data transfers, although bits
D31-D24 are not used. Refer to the module address memory map
in Appendix B for specific register information.
The VXI module is configured as two DAC modules referred to as
Module “0” and Module “1”. Each of the DAC outputs are brought
out to the VXI front panel as well as the module LED indicators.
An external front panel clock has been implemented to drive the
CLK signas of each of the DAC modules. An internal clock can be
generated by selecting one of the TTLTRG0-7 lines as the source
of the clock. The clock signal will be active when the TTLTRG is
asserted low.
Also, the ENABLE/RESET signal of each module can be
connected to the VXI backplane signals TTLTRG0-7. The
ENABLE/RESET signal will be active when the TTLTRG signal is
asserted low.
Additional information regarding the specifics of the 7064R-S-1844
module are described in the following Appendices:
Appendix A
DAC Module Description & Specifications.
Appendix B
Software Interface – Memory Maps.
Appendix C
Module Calibration Application Notes.
The 7064R-S-1844 supports 32-bit Data access and A16/A24
addressing space.
Summary of Contents for 7064R-S-1844
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