Rabbit Rabbit 4000, User Manual

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70 Rabbit 4000 Microprocessor User’s Manual
7.2.1 Registers
7.3 Dependencies
7.3.1 I/O Pins
The external interrupts can be enabled on pins PD0, PD1, PE0, PE1, PE4, and PE5. Each
pin is associated with a particular interrupt vector as shown in Table 7-1 below.
7.3.2 Clocks
The external interrupts are controlled by the peripheral clock. A pulse must be present for
at least three peripheral clock cycles to trigger an interrupt.
7.3.3 Interrupts
An external interrupt is generated whenever the selected edge occurs on an enabled pin.
The interrupt request is automatically cleared when the interrupt is handled.
The external interrupt vectors are in the EIR at offsets 0x000 and 0x010. They can be set
as Priority 1, 2, or 3 in the appropriate I
x CR.
7.4 Operation
The following steps must be taken to enable the external interrupts:
1. Write the vector(s) to the interrupt service routine to the external interrupt table.
2. Configure I x CR to select which pins are enabled for external interrupts, what edges are
detected on each pin, and the interrupt priority.
7.4.1 Example ISR
A sample interrupt handler is shown below.
extInt_isr::
; respond to external interrupt here
; interrupt is automatically cleared by interrupt acknowledge
ipres
ret
Register Name Mnemonic I/O Address R/W Reset
Interrupt 0 Control Register I0CR 0x0098 R/W xx000000
Interrupt 1 Control Register I1CR 0x0099 R/W xx000000
Table 7-1. Rabbit 4000 Interrupt Vectors
Vector Register Pins
Interrupt 0 I0CR PD0, PE0, PE4
Interrupt 1 I1CR PD1, PE1, PE5