Rabbit Rabbit 4000, User Manual

Page: 187 / 358

Chapter 19 DMA Channels 177
19.2 Dependencies
19.2.1 I/O Pins
External DMA Request 0 can be enabled from pins PD2, PE2, or PE6. External DMA
Request 1 can be enabled from pins PD3, PE3, or PE7.
The DMA can use either the memory management unit or the auxiliary I/O bus to perform
its transfers, and so will use the appropriate pins for each operation.
19.2.2 Clocks
The DMA peripheral uses the peripheral clock for all operations. If the timed request
option is enabled, then the 16-bit timed request counter will be clocked by the peripheral
clock and will provide a DMA request each time it counts down to zero.
19.2.3 Interrupts
Each DMA channel has its own dedicated interrupt that can occur at the end of any DMA
transfer, as specified in DyCR (normally loaded from the buffer descriptor). The interrupt
request is automatically cleared when the interrupt is handled.
The DMA interrupt vectors are in the EIR starting at offset 0x080 for DMA Channel 0 and
ending at offset 0x0F0 for DMA Channel 7. They can be set as Priority 1, 2, or 3.