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Rabbit 6000 User’s Manual
digi.com
249
24. DMA C
HANNELS
24.1 Overview
There are 16 independent DMA channels on the Rabbit 6000. All 16 channels are identical, and are capable
of transferring data between memory, external I/O, or internal I/O. The priority among the channels can be
either fixed or rotating, and the DMA use of the external bus can be limited to guarantee interrupt latency or
CPU throughput. The DMA channels are capable of special handling for the last byte of data when sending
data to selected internal I/O addresses (such as the HDLC serial ports or to the Ethernet peripheral), and
can also transfer end-of-frame status after transferring data from selected internal I/O addresses.
The DMA channels can watch the data being transferred, and can terminate a transfer when a particular
byte is matched. A mask is available for the byte match to allow termination only on particular bit settings
in the data instead of an exact byte match.
There are two DMA transfer methods available in the Rabbit 6000 — the bus-interleaving mode and the
bus-sharing mode. If all sources and destinations are internal to the device, the bus-interleaving mode
should be used. In this mode, the pipelined functionality of the internal SRAM allows both DMA and code
execution to occur simultaneously, as shown in Figure 24.1. This mode is different from the DMA func-
tionality in previous processors, and is enabled by default whenever possible.
Figure 24.1 Bus-Interleaving Mode
The other mode is used whenever an external device is used for the source or destination, and matches the
DMA behavior of the Rabbit 4000 and 5000 processors. In this bus-sharing mode, the memory bus alter-
nates between DMA and processor use, as shown in Figure 24.2. When DMA is active, the CPU is not
processing instructions, and vice-versa.
Summary of Contents for 6000
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