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SDC100
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User Manual
Rev. 3.0 - 09/10/01
c)
To automatically change over from a station which doesn’t transmit traffic
news.
The R.D.S. is proper for the transmission of information in mono/stereo programs
of VHF/MF (87.5-108 Mhz).
It satisfies the requested requirements to the transmission of supplementary data
on radio programs:
1) Compatibility with the current mono/stereo transmissions;
2) Absence of interferences towards the adjacent programs;
3) Compatibility with other identification systems which are already working.
The system, selected by an international specialistic team, allows the data
transmission at a speed of 1187.5 bit/sec with phase modulation at two levels ,
carrier wave 57 MHz and range ±2 Khz.
This board implements the synchronization with the pilot tone and the generation
ofmthe modulated subcarrier, using the data provided by the CPU card.
8.7.1
CPU Card
The CPU card is fixed to the R.D.S. board.
This board generates the bit stream that is transmittes on the RDS channel. It is
programmed externally via the serial interface.
The main characteristics of the CPU board are:
•
Microprocessor:
80C552
•
Eprom size:
64KBytes
•
Static RAM size:
32KBytes
•
Communication interfaces:
RS232-RS485 and I
2
C Bus
•
Self-diagnosys Leds:
9, red
Summary of Contents for SDC100
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Page 49: ...SDC100 Wiring Diagram 1 2 Technical Appendix Rev 1 0 09 10 01...
Page 51: ...SDC100 CSSWPSUP003 1 4 Technical Appendix Rev 1 1 09 10 01...
Page 55: ...SDC100 CSSDC100PA02 1 4 Technical Appendix Rev 1 0 09 10 01...
Page 59: ...SDC100 SLSDC100MB01 1 8 Technical Appendix Rev 1 0 09 10 01...
Page 67: ...SDC100 CSSTCOD03 1 6 Technical Appendix Rev 1 1 18 09 02...
Page 73: ...SDC100 SLPTCODSTE02 1 4 Technical Appendix Rev 1 0 09 10 01...
Page 77: ...SDC100 CSSDCRDS003 1 8 Technical Appendix Rev 1 1 09 10 01...
Page 85: ...SDC100 SLPTCPU55202 1 4 Technical Appendix Rev 1 0 09 10 01...