UMTS/HSPA Module Series
UG96 Hardware Design
UG96_Hardware_Design 37 / 76
The module is designed as DCE (Data Communication Equipment). The following table shows the pin
definition of UART interface.
Table 10: Pin Definition of Main UART Interface
Pin Name Pin No. I/O
Description
Comment
DTR
30
DI
Data terminal ready.
Sleep mode control.
1.8V power domain
RXD
34
DI
Receive data
1.8V power domain
TXD
35
DO
Transmit data
1.8V power domain
CTS
36
DO
Clear to send
1.8V power domain
RTS
37
DI
Request to send
1.8V power domain
DCD
38
DO
Data carrier detection
1.8V power domain
RI
39
DO
Ring indicator
1.8V power domain
The logic levels are described in the following table.
Table 11: Logic Levels of Digital I/O
Parameter
Min.
Max.
Unit
V
IL
-0.3
0.35
V
V
IH
1.3
1.85
V
V
OL
0
0.25
V
V
OH
1.55
1.8
V
UG96 provides one 1.8V UART interface. A level translator should be used if
customers’ application is
equipped with a 3.3V UART interface, and TXS0108EPWR provided by
Texas Instruments
is
recommended. The following figure shows a reference design.
