Automotive Module Series
AG525R-GL QuecOpen
Hardware Design
AG525R-GL_QuecOpen_Hardware_Design 30 / 104
PCM_IN
263
DI
PCM data input
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
PCM_OUT
261
DO PCM data output
V
OL
max = 0.45 V
V
OH
min = 1.35 V
PCIe Interface
Pin Name
Pin No.
I/O
Description
DC
Characteristics
Comment
PCIE_REFCLK
_P
40 AO
PCIe reference
clock (+)
Require differential
impedance of 95
Ω
.
If unused, keep
them open.
PCIE_REFCLK
_M
38 AO
PCIe reference
clock (-)
PCIE_TX_M
44
AO PCIe transmit (-)
PCIE_TX_P
46
AO PCIe transmit (+)
PCIE_RX_M
32
AI
PCIe receive (-)
PCIE_RX_P
34
AI
PCIe receive (+)
PCIE_CLKREQ 36
IO
PCIe clock request
V
OL
max = 0.45 V
V
OH
min = 1.35 V
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
1.8 V power domain
If unused, keep
them open.
PCIE_RST 39
DO
PCIe
reset
V
OL
max = 0.45 V
V
OH
min = 1.35 V
PCIE_WAKE 30
DI PCIe
wakeup
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
RGMII Interface
Pin Name
Pin No.
I/O
Description
DC
Characteristics
Comment
RGMII_MD_IO 10
IO
RGMII MDIO
management data
Power domain
determined by
RGMII_PWR_IN
If unused, keep
them open.
RGMII_MD_
CLK
11 DO
RGMII MDC
management clock
RGMII_RX_0 13
DI
RGMII receive data
bit 0
