TITLE
PROJECT
Yeoman CHEN
CHECKED BY
Eden LIU
DRAWN BY
Reference Design
C
OF
A
6
5
4
3
2
1
SHEET
A
B
C
D
1
2
3
4
5
6
D
C
B
Quectel Wireless Solutions
SIZE
VER
10
7
DATE 2016/11/11
EC25
A2
the clock and MDI interface traces), and the trace width needs to be at least 25 mils.
L701, C713 and C714 are close to Pin 3.
Selected when external
75R @100MHz, DCR=0.1R
Add one 0.1uF capacitor
MODE 2
MODE 1
MODE 0
MODE 3
PHY
_AD2
PHY_AD1
PHY_AD0
AVDD_1V1
Close to AR8033.
SGMII Design (Part 1)
Note 2
Note 3
Notes:
3. R715 must be close to AR8033. The traces of the resistor must be away from other traces (especially
4. The two capacitors should be selected according to the actual load capacitance of crystal and
Note 4
the board-level test results, at full load application temperature and voltage range.
Note 5
5. The differential trace impedance of SGMII must be limited to 100Ω.
beside the module.
2. To minimize crosstalk, the reset trace must be at least 20 mils away from other signal traces.
Note 1
1. SGMII_MDIO_DAT should be connected to the USIM2_VDD beside the module with a 1.5K pull-up resistor.
Note 6
6. EMI filter is reserved. If LED pins are not used, keep C714, C719, C721=470pF.
interupt is required.
7. The space between SGMII differential pair (RX and TX traces) should be 3 times of the trace width at least.
Also, SGMII should keep a distance of 3 times of its trace width from other signal lines.
1 MDC
2 RSTN
3 LX
4 VDD33
5 INT
6 XTLO
7 XTLI
8 AVDDL
9 RBIAS
10 VDDH_REG
11 TRXP0
12 TRXN0
13
AVDDL
14
TRXP1
15
TRXN1
16
AVDD33
17
TRXP2
18
TRXN2
19
AVDDL
20
TRXP3
21
TRXN3
22
NC
23
LED_ACT
24
LED_1000
25
CLK_25M
26
LED_10_100
27
RXD3
28
RXD2
29
VDDIO_REG
30
RXD1
31
RXD0
32
RX_DV
33
RX_CLK
34
TX_EN
35
GTX_CLK
36
TXD0
37
TXD1
38
TXD2
39
TXD3
40
WOL_INT
41
SD
42
SON
43
SOP
44
AVDDL
45
SIN
46
SIP
47
DVDDL
48
MDIO
49
GND
U701
AR8033-AL1B-R
R703
NM_100K
C706 NM_1uF
R715
2.37K 1%
R706
10K
R704
NM_10K
C718
0.1uF
C722
0.1uF
C720
0.1uF
C701 2.2uF
C707
10uF
C723
1uF
C724
0.1uF
FB702
BLM15AX700SN1D
C717
1uF
C712
0.1uF
C711
100pF
1
XTAL
2 GND
3
XTAL
4 GND
Y701
25MHz
C715
10pF
C716
10pF
C721 NM/470pF
C719 NM/470pF
C713
NM
C714
NM/470pF
D701
GREEN
R714
510R
C702 0.1uF
C703
0.1uF
C705
0.1uF
R705
0R
R711
0R
C708
0.1uF
FB701
BLM15AX700SN1D
R702
NM/10K
L701
4.7uH
C709
10uF
C710
0.1uF
C704
0.1uF
R713
10K
R707
10K
R712
10K
R708
10K
R709
10K
R710
10K
R716
10K
R717
10K
R701
1.5K
[1] EPHY_RST_N
[1] EPHY_INT_N
INT_WOL_HOST
AVDD_1V1
[7,8]
VDD33_SGMII
SD_SGMII
[1]
SGMII_TX_M
[1]
SGMII_RX_P
[1]
SGMII_RX_M
[1]
SGMII_TX_P
AVDD33_PHY
[7,8] VDD33_SGMII
[7]
VDDH_2V5
[7] VDDH_2V5
[8] TRXP0
[8] TRXN0
[8]
TRXP1
[8]
TRXN1
[8]
TRXP2
[8]
TRXN2
[8]
TRXP3
[8]
TRXN3
[8]
LED_ACT
[8]
LED_1000
[1] SGMII_MDIO_DAT
[1] SGMII_MDIO_CLK
[7,8] VDD33_SGMII
CLK_25M
[1,2,4,9,10] VDD_EXT
[7] VDDH_2V5
[7]
AVDD_1V1
[7] AVDD_1V1
[7] DVDD_1V1
[7] DVDD_1V1
[7]
AVDD_1V1
[7] AVDD_1V1
[7]
VDDH_2V5
[1] USIM2_VDD
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