Quectel EC21 Series, Hardware Design

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LTE Module Series
EC21 Hardware Design
EC21_Hardware_Design Confidential / Released 23 / 94
PCM Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
PCM_IN 24 DI PCM data input
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep it open.
PCM_OUT 25 DO PCM data output
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
If unused, keep it open.
PCM_SYNC 26 IO
PCM data frame
synchronization
signal
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
In master mode, it is an
output signal.
In slave mode, it is an
input signal.
If unused, keep it open.
PCM_CLK 27 IO PCM clock
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
In master mode, it is an
output signal.
In slave mode, it is an
input signal.
If unused, keep it open.
I2C Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
I2C_SCL 41 OD
I2C serial clock.
Used for external
codec
External pull-up
resistor is required.
1.8V only.
If unused, keep it open.
I2C_SDA 42 OD
I2C serial data.
Used for external
codec
External pull-up
resistor is required.
1.8V only.
If unused, keep it open.
SGMII Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
EPHY_RST_N 119 DO Ethernet PHY reset
For 1.8V:
V
OL
max=0.45V
V
OH
min=1.4V
For 2.85V:
V
OL
max=0.35V
V
OH
min=2.14V
1.8V/2.85V power
domain.
If unused, keep it
open.
Quectel
Confidential