Quectel EC200U Series, Hardware Design

Page: 56 / 100

LTE Standard Module Series
EC200U_Series_Hardware_Design 51 / 94
SD Card Connector
DAT2
CD/DAT3
CMD
VDD
CLK
VSS
DAT0
DAT1
DETECTIVE
Module
SDIO1_DATA3
SDIO1_DATA2
SDIO1_DATA1
SDIO1_VDD
SDIO1_DATA0
SDIO1_CLK
SDIO1_CMD
SD_DET
R1 0R
R7
NM
R8
NM
R9
NM
R10
NM
R11
NM
VDD_3V
R2 0R
R3 0R
R4 0R
R5 0R
R6 0R
C2
NM
D2 C3
NM
D3 C4
NM
D4 C5
NM
D5 C6
NM
D6 C1
NM
D1
C7
10 pF
D7
C8
33 pF C9
100 nF
+
C10
100
μ
F
Figure 25: Reference Circuit of SD Card Interface
In SD card interface design, in order to ensure good communication performance with SD card, the
following design principles should be complied with:
⚫
The voltage range of SD card power supply VDD_3 V is 2.7
–
3.6 V and a sufficient current up to 0.8 A
should be provided. As the maximum output current of SDIO1_VDD is 150 mA which can only be
used for SDIO pull-up resistors, an externally power supply is needed for SD card.
⚫
To avoid jitter of bus, resistors R7
–
R11 are needed to pull up the SDIO to SDIO1_VDD. Value of
these resistors is among 10
–
100 k
Ω and the recommended value is 100 kΩ. SDIO1_VDD should be
used as the pull-up power.
⚫
In order to adjust signal quality, it is recommended to add 0
Ω resistors R1
–
R6 in series between the
module and the SD card. The bypass capacitors C1
–
C6 are reserved and not mounted by default. All
resistors and bypass capacitors should be placed close to the module.
⚫
In order to offer good ESD protection, it is recommended to add a TVS diode on SD card pins near
the SD card connector with junction capacitance less than 15 pF.
⚫
Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals,
etc., as well as noisy signals such as clock signals, DC-DC signals, etc.
⚫
It is important to route the SDIO signal surrounded with ground on the layer and ground planes above
and below. The impedance of SDIO data trace is 50
Ω ±10 %.
⚫
Make sure the adjacent trace spacing is more than two times of the trace width and the load
capacitance of SDIO bus should be less than 15 pF.
⚫
It is recommended to keep the trace length difference between SDIO1_CLK and SDIO1_DATA [0:3]/
SDIO1_CMD less than 1 mm and the total routing length less than 50 mm.
3.18. WLAN Application Interface *
The module provides an SDIO 1.1 standard WLAN application interface.