XCubeSAN 3300
Hardware Manual
System Components Overview
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2.5.1.
Mechanism of Cache Data Protection
The following image is the working sequence of Cache-to-Flash workflow.
Figure 2-14 Cache-to-Flash Workflow
Cache-to-Flash technology will first flush CPU cache to memory RAM, then flush memory RAM
to M.2 flash module to maintain the upmost data consistency. It leverages the strength of both
BIOS and CPU to quickly backup memory RAM data to the flash module. In order to quickly
move data from memory RAM to flash module, M.2 PCI‐Express interface flash module is
selected for better performance and less power consumption. In Cache‐to‐Flash recovery phase,
BIOS will check C2F flag status. If C2F flag is ON, I/O cache data will be recovered from the M.2
flash module and then continue normal booting. If C2F flag is OFF, the normal booting process
continues.
2.5.2.
Cache-to-Flash Module LEDs and Button
Please refer to the following for the definition of LED and button behavior.
Figure 2-15 Flash Module LEDs and Button
