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Hardware Configuration

PEB-2738I User’s Manual

2-6

J7 : USB Port5&Port6 Header

Pin No.

Signal Description

Pin No.

Signal Description

1 +5V

2 +5V

3 USBD6-

4 USBD5-

5 USBD6+

6 USBD5+

7 GND

8 GND

9 N/C

J8 : Front Panel Header

Pin No.

Signal Description

Pin No.

Signal Description

Power LED-

Power LED+

3 5VSB

4 SUS_LED

5 +3.3V

6 HDD_LED

7 RESET

8 GND

9 GND

10 PWR_ON_SW#

J9 : 8 bit GPIO Header

Pin No.

Signal Description

Pin No.

Signal Description

1 GP30

2 GP34

3 GP31

4 GP35

5 GP32

6 GP36

7 GP33

8 GP37

9 GND

10 +5V

J10 : SDVO daughter board connector

J11 : Fan Connector

Pin No.

Signal Description

1 GND
2 +12V
3 RPM

Summary of Contents for PEB-2738I Series

Page 1: ...PEB 2738I Series Embedded System Board User s Manual Version 1 0a Copyright Portwell Inc 2010 All rights reserved All other brand names are registered trademarks of their respective owners ...

Page 2: ...n Memory 3 2 3 4 Installing the Single Board Computer 3 2 3 4 1 Chipset Component Driver 3 2 3 4 2 Intel Integrated Graphics GMCH Chip 3 3 3 4 3 Intel Gigabit Ethernet Controller 3 3 3 4 4 Audio Controller 3 3 3 5 Clear CMOS Operation 3 4 3 6 WDT Function 3 4 3 7 GPIO 3 5 Chapter 4 BIOS Setup Information 4 1 4 1 Entering Setup 4 1 4 2 Main Menu 4 2 4 3 Advanced 4 3 4 4 PCIPnP 4 16 4 5 Boot 4 18 4 ...

Page 3: ...Timer function Chapter 4 BIOS Setup Information Specifies the meaning of each setup parameters how to get advanced BIOS performance and update new BIOS In addition POST checkpoint list will give users some guidelines of trouble shooting Chapter 5 Troubleshooting Provides various useful tips to quickly get PEB 2738I running with success As basic hardware installation has been addressed in Chapter 3...

Page 4: ...LVDS by request Based on the Intel Atom processor Z500PT series platform the PEB 2738I takes advantage of the processor s very low power consumption Ground breaking power management techniques and wide temperature so it can be a truly industrial temperature and fanless configuration In addition the PEB 2738I supports DC 12V input one SO DIMM memory slot for DDR2 SDRAM up to 2GB and comes with one ...

Page 5: ...t Intel System Controller Hub US15WPT z System BIOS AMI BIOS z Main Memory One 200 pin DDR2 SODIMM socket supports up to 2GB dual channel 400 533MHz memory z Serial Port Support one RS 232 and one RS 232 422 485 selectable z USB Interface Support six USB Universal Serial Bus ports four on rear I O and two on board header for internal devices USB port6 7 can support USB 2 0 only base on Intel speci...

Page 6: ...rnal I O One 44 pin IDE connector One Type II CompactFlash socket One LVDS port One SDVO port BTB connector with SDVO USB PCI E x1 signal One SDIO port 2x8 pin 2mm pitch box header One RS 232 port 2x5 pin 2mm pitch box header Two USB 2 0 ports 2x5 pin 2mm pitch header One Client USB connector One 3 pin power connector for system fan One power output port Power on off LED Hard drive activity LED an...

Page 7: ...nection Ver 10 6 15 0 Audio Card Onboard Realtek ALC662 Audio Chipset Audio Driver Realtek High Definition Audio Ver 6 0 1 5680 Chip Driver Intel Chipset Device Software Ver 8 8 0 1011 USB 2 0 Driver Intel SCH Family USB2 Enhanced Host Controller Ver 8 8 0 1001 IDE HDD WD WD1200BEVE 120GB 2 5 Compact Flash Transcend Ultra DMA 1GB TS1GCF45IF A5 USB CDROM ASUS CB 52164 DVD ROM Power Supply Seasonic ...

Page 8: ...System Overview PEB 2738I User s Manual 1 5 1 3 1 Mechanical Drawing ...

Page 9: ...System Overview PEB 2738I User s Manual 1 6 1 4 System Architecture All of details operating relations are shown in PEB 2738I System Block Diagram PEB 2738I Block Diagram ...

Page 10: ...l of the configuration jumpers on PEB 2738I are in the proper position The default settings are indicated with a star sign Ì 2 1 Jumper Setting For users to customize PEB 2738I s features In the following sections Short means covering a jumper cap over jumper pins Open or N C Not Connected means removing a jumper cap from jumper pins PEB 2738I Jumper and Connector Locations Top ...

Page 11: ...JP1 JP2 JP3 Microcontroller programming JP1 JP2 JP3 Function 1 2 Short Normal operation Ì 1 2 Open Programming microcontroller JP4 5V 3 3V backlight enable pin power level selection JP4 Function 1 2 Short 3 3V 2 3 Short 5V Ì JP7 Clear CMOS JP7 Function 1 2 Short Normal operation Ì 1 2 Open Clear CMOS ...

Page 12: ...tor Function Remark J1 PS 2 Keyboard Mouse J2 Mini USB Port J3 SDIO Port J4 PATA 44 Pin EIDE J5 Microcontroller programmer J6 Serial port 2 J7 USB port 5 6 J8 Front Panel J9 8 bit GPIO J10 SDVO daughter board connector J11 FAN J12 Single channel LVDS panel interface J13 LPC Debug Port J14 Audio Connector Side output Surround line output option J15 Audio Connector Line input Front output option J16...

Page 13: ...ription 1 KB_CLK 2 Mouse_DATA 3 KB_DATA 4 5V 5 Mouse _CLK 6 GND J2 Mini USB Port Pin No Signal Description Pin No Signal Description 1 5V_USB_CLIENT 2 USBD2 3 USBD2 4 NC 5 GND J3 SDIO Connector Pin No Signal Description Pin No Signal Description 1 SDIO_DATA0 2 3 3V 3 SDIO_DATA1 4 SDIO_CLK 5 SDIO_DATA2 6 SDIO_CMD 7 SDIO_DATA3 8 3 3V 9 SDIO_DATA4 10 GND 11 SDIO_DATA5 12 SDIO_CD 13 SDIO_DATA6 14 SDIO...

Page 14: ...15 19 GND 20 N C 21 PDDREQ 22 GND 23 PDIOW 24 GND 25 PDIOR 26 GND 27 PDIORDY 28 GND 29 PDDACK 30 GND 31 IRQ14 32 N C 33 PDA1 34 GND 35 PDA0 36 PDA2 37 PDCS1 38 PDCS3 39 IDE_PDACTIVE 40 GND 41 5V 42 5V 43 GND 44 N C J5 Microcontroller programmer Header Pin No Signal Description 1 V pp 2 3 3V 3 GND 4 I2C_DATA 5 I2C_CLK 6 N C J6 Serial port 2 Header Pin No Signal Description Pin No Signal Description...

Page 15: ...ont Panel Header Pin No Signal Description Pin No Signal Description 1 Power LED 2 Power LED 3 5VSB 4 SUS_LED 5 3 3V 6 HDD_LED 7 RESET 8 GND 9 GND 10 PWR_ON_SW J9 8 bit GPIO Header Pin No Signal Description Pin No Signal Description 1 GP30 2 GP34 3 GP31 4 GP35 5 GP32 6 GP36 7 GP33 8 GP37 9 GND 10 5V J10 SDVO daughter board connector J11 Fan Connector Pin No Signal Description 1 GND 2 12V 3 RPM ...

Page 16: ...L_DDC_DATA 15 GND 16 GND 17 N C 18 N C 19 N C 20 N C 21 N C 22 N C 23 N C 24 N C 25 N C 26 N C 27 N C 28 N C 29 GND 30 GND J13 LPC Debug Port J12 LVDS Panel Interface Connector Pin No Signal Description Pin No Signal Description 1 LAD0 2 3 3V 3 LAD1 4 PLT_RST 5 LAD2 6 LFRAME 7 LAD3 8 LPC_PCID 9 N C 10 GND J14 Audio Connector Side output Surround line output Option Pin No Signal Description Pin No ...

Page 17: ..._IN_L 6 GND 7 REAR_OUT_R 8 SURR_JD 9 REAR_OUT_L 10 NC J16 Big 4 Power Output Pin No Signal Description 1 12V 2 GND 3 GND 4 VCC J17 LVDS Panel Back Light Inverter Power Connector Pin No Signal Description 1 BACKLIGH_ENABLE 2 GND 3 12V 4 GND 5 5V J18 RJ45 Ethernet Port PIN No Signal Description 1 MDI3 MDI3N 2 MDI3 MDI3P 3 MDI2 MDI2N 4 MDI2 MDI2P 7 MDI1 MDI1N 8 MDI1 MDI1P 9 MDI0 MDI0N 10 MDI0 MDI0P ...

Page 18: ...rt1 Connector Pin No Signal Description Pin No Signal Description A1 5V B1 5V A2 USBD0 B2 USBD1 A3 USBD0 B3 USBD1 A4 GND B4 GND CG1 GND CG3 GND CG2 GND CG4 GND J21 Power Adapter Input Jack J22 Audio Jack Microphone input J23 Audio Jack Stereo line output J24 Serial port 1 Connector Pin No Signal Description Pin No Signal Description 1 DCD1 2 RXD1 3 TXD1 4 DTR1 5 GND 6 DSR1 7 RTS1 8 CTS1 9 RI1 J25 ...

Page 19: ...a 6 30 Data 14 6 Data 7 31 Data 15 7 HDC CS0 32 HDC CS1 8 Ground 33 N C 9 Ground 34 IOR 10 Ground 35 IOW 11 Ground 36 Write Enable 12 Ground 37 IRQ 13 5V 38 5V 14 Ground 39 CSEL 15 Ground 40 N C 16 Ground 41 RESET 17 Ground 42 IORDY 18 HDC SDA2 43 DREQ 19 HDC SDA1 44 DACK 20 HDC SDA0 45 HDC ACT 21 Data 0 46 PDIAG 22 Data 1 47 Data 8 23 Data 2 48 Data 9 24 N C 49 Data 10 25 N C 50 Ground J27 Batter...

Page 20: ... CPU FSB 400 533MHz CMOS used CPU speed of Intel ATOM Processor for Mobile can be detected automatically 3 2 Intel System Controller Hub US15WP T The Intel System Controller Hub US15WP T is a low power chipset in one small 22x22mm package It combines the Intel Graphics Media Accelerator 500 memorycontroller and I O controller in a single chip solution while featuring advanced 3D graphics and exten...

Page 21: ...CPU and memory module on right position Step 3 Place PEB 2738 into the dedicated position in the system Step 4 Attach cables to existing peripheral devices and secure it WARNING Please ensure that SBC is properly inserted and fixed by mechanism Note Please refer to section 3 4 1 to 3 4 4 to install INF VGA LAN Audio drivers 3 4 1 Chipset Component Driver The chipset on PEB 2738 is a new chipset th...

Page 22: ... VISTA 3 4 3 Intel Gigabit Ethernet Controller Drivers Support Please find Intel 82574IT LAN driver in Ethernet directory of PEB 2738 CD title The drivers support Windows XP VISTA LED Indicator for LAN status PEB 2738 provides two LED indicators to report Intel 82574IT Gigabit Ethernet interface status Please refer to the table below as a quick reference guide Operation of Ethernet Port Intel 8257...

Page 23: ...tivated It will cause a system reset once it expires Before WDT expires a refreshing command with a Twd can be issued to re count WDT and continue the status monitoring If the system encounters a software or application hang WDT will generate a system reset after its timeout The related Control Registers of WDT are included in the following programming guide that is written in C language User can ...

Page 24: ...Register The GPIO ports are located on J12 shown as follows Notes Do not short circuit Pin 9 and 10 of J11 3 8 WDT GPIO Assembly Code include stdio h include stdlib h include conio h void WDT_Enable int time int mode void WDT_Disable void GPIO_Set_Mode int bit int mode void GPIO_Write int bit int data int GPIO_Read int bit void main outp 0x2e 0x87 Input SIO entry key outp 0x2e 0x87 WDT sample code...

Page 25: ...ce 8 outp 0x2e 0xF5 outp 0x2f inp 0x2f mode 0x08 bit3 0 second 1 Minute outp 0x2e 0xf6 outp 0x2f time Set time sec min outp 0x2e 0xf7 outp 0x2f inp 0x2f 0xc0 enable reset time by mouse keyboard interrupt void WDT_Disable outp 0x2e 0x2d outp 0x2f inp 0x2f 0x01 Disable WDT function bit 0 7 GPIO 30 37 mode 0 output 1 input void GPIO_Set_Mode int bit int mode int tmp 1 bit outp 0x2e 0x07 outp 0x2f 0x0...

Page 26: ...oid GPIO_Write int bit int data int tmp 1 bit outp 0x2e 0x07 outp 0x2f 0x09 entry device 9 outp 0x2e 0xf1 outp 0x2f inp 0x2f tmp tmp data 0 for low 1 for high high return 1 low return 0 int GPIO_Read int bit int tmp 1 bit int data outp 0x2e 0x07 outp 0x2f 0x09 entry device 9 outp 0x2e 0xf1 data inp 0x2f tmp read bit if data 0 return 0 else return 1 ...

Page 27: ...cant enough to abort the start up 4 1 Entering Setup Turn on or reboot the computer When the message Hit DEL if you want to run SETUP appears press Del key to enter BIOS setup program If the message disappears before you respond but you still wish to enter Setup please restart the system to try COLD START again by turning it OFF and then ON or touch the RESET button You may also restart from WARM ...

Page 28: ...ions such as time date etc AMI BIOS Processor System Memory These items show the firmware and hardware specifications of your system Read only System Time The time format is Hour Minute Second Use or to configure system Time System Date The date format is Day Month Date Year Use or to configure system Date ...

Page 29: ...BIOS Setup Information PEB 2738I User s Manual 4 3 4 3 Advanced Use this menu to set up the items of special enhanced features ...

Page 30: ...mit Disable for Windows XP Execute Disable Bit Capability When disable force the XD feature flag to always return 0 Hyper Threading Technology Enable for Windows XP and Linux4 OS optimized for Hyper Threading Technology and disabled for other OS OS not optimized for Hyper Threading Technology Intel R SpeedSetup tech Disable Disable GV3 Enable Enable GV3 ...

Page 31: ...s Manual 4 5 IDE Configuration The IDE Configuration the IDE devices such as hard disk drive or CD ROM drive It uses a separate sub menu to configure each hard disk drive Master and Slave ATA IDE Configuration The choice Disabled Compatible ...

Page 32: ...or PgDn to select Manual None or Auto type You can use Manual to define your own drive type manually LBA Large Mode Enabling LBA causes Logical Block Addressing to be used in place of Cylinders Heads and Sectors Block Multi Sector Transfer Any selection except Disabled determines the number of sectors transferred per block PIO Mode Indicates the type of PIO Programmed Input Output DMA Mode Indicat...

Page 33: ...becomes offline 32 Bit Data Transfer Enable Disable 32 bit Data Transfer Hard Disk Write Protect Disabled Enabled device write protection this will be effective only if device is accessed through BIOS The choice Disabled Enabled IDE Detect Time Out Sec Select the time out value for detecting ATA ATAPI device s The choice 0 5 10 15 20 25 30 35 ATA PI 80Pin Cable Detection Select the mechanism for d...

Page 34: ...BIOS Setup Information PEB 2738I User s Manual 4 8 Hardware Health Configuration Configuration monitor the Hardware Health ...

Page 35: ...BIOS Setup Information PEB 2738I User s Manual 4 9 ACPI Configuration Select for Advanced ACPI Configuration ...

Page 36: ...he setting of this field Option is S3 STR The S3 sleep mode is a lower power state where the information of system configuration and open applications files is saved to main memory that remains powered while most other hardware components turn off to save energy The information stored in memory will be used to restore the system when a wake up event occurs Repost Video on S3 Resume Determines whet...

Page 37: ...re additional ACPI options ACPI Version Features Enable RSDP pointers to 64 bit Fixed System Description Tables The choice ACPI v1 0 ACPI v2 0 ACPI v3 0 ACPI APIC support Include ACPI APIC table pointer to RSDT pointer list The choice Disabled Enabled AMI OEMB table Include OEMB table pointer to R X SDT pointer list The choice Disabled Enabled ...

Page 38: ...ce Disabled Enabled Chipset ACPI Configuration Chipset ACPI related Configuration settings Use this section to configure additional ACPI options APIC ACPI SCI IRQ Enable Disable APIC ACPI SCI IRQ The choice Disabled Enabled USB Device Wakeup From S3 S4 Enable Disable USB device Wake from S3 S4 mode The choice Disabled Enabled ...

Page 39: ... Table MPS Revision This field allows you to select which MPS Multi Processor Specification version to be used for the operating system You need to select the MPS version supported by your operating system To find out which version to use consult the vendor of your operating system The choice 1 1 1 4 ...

Page 40: ...BIOS Setup Information PEB 2738I User s Manual 4 14 Smbios Configuration SMBIOS Configuration Menu Smbios Smi Support SMBIOS SMI Wrapper supports for PnP Func 50h 54h The choice Disabled Enabled ...

Page 41: ...rt or have any USB 1 1 2 0 driver installed such as DOS and SCO Unix The choice Disabled Enabled Auto USB 2 0 Controller Mode This setting specifies the operation mode of the onboard USB 2 0 controller The choice FullSpeed HiSpeed BIOS EHCI Hand Off This is a workaround for OSes without EHCI hand off support The EHCI ownership change should claim by EHCI driver The choice Disabled Enabled ...

Page 42: ...tem Boot The choice No Yes Plug Play O S No lets the BIOS configure all the devices in the system Yes lets the operating system configure Plug and Play PnP devices not required for boot if your system has a Plug and Play operating system The choice No Yes PCI Latency Timer Select value in units of PCI clocks for PCI device latency timer register The choice 32 64 96 128 160 192 224 248 ...

Page 43: ...ering for reading writing to IDE drives The choice Disabled Enabled OffBoard PCI ISA IDE Card Some PCI IDE cards may require this to be set to the PCI slot number that is holding the card AUTO Works for most PCI IDE cards The choice Auto PCI Slot1 PCI Slot2 PCI Slot3 PCI Slot4 PCI Slot5 PCI Slot6 IRQ 3 IRQ 4 IRQ5 IRQ7 IRQ 9 IRQ 10 IRQ 11 IRQ 14 IRQ 15 Available Specified IRQ is available to be use...

Page 44: ...BIOS Setup Information PEB 2738I User s Manual 4 18 4 5 Boot Use this menu to specify the priority of boot devices ...

Page 45: ...oard or system manufacturer s full screen logo When it is enabled the BIOS will display the full screen logo during the boot up sequence hiding normal POST messages When it is disabled the BIOS will display the normal POST messages instead of the full screen logo Please note that enabling this BIOS feature often adds 2 3 seconds of delay to the booting sequence This delay ensures that the logo is ...

Page 46: ...Auto Wait For F1 If Error When this setting is set to Enabled and the boot sequence encounters an error it asks you to press F1 If disabled the system continues to boot without waiting for you to press any keys The choice Disabled Enabled Hit DEL Message Display Set this option to Disabled to prevent the message as follows Hit Del if you want to run setup It will prevent the message from appearing...

Page 47: ...will you be able to gain access to their ROM setup utilities The choice Disabled Enabled Boot Device Priority 1st Boot Device The items allow you to set the sequence of boot devices where BIOS attempts to load the disk operating system First press Enter to enter the sub menu Then you may use the arrow keys to select the desired device then press or PageUp PageDown key to move it up down in the pri...

Page 48: ...d Supervisor Password controls access to the BIOS Setup utility These settings allow you to set or change the supervisor password User Password Change User Password User Password controls access to the system at boot These settings allow you to set or change the user password Boot Sector Virus Protection Boot Sector Virus Protection The choice Disabled Enabled ...

Page 49: ...BIOS Setup Information PEB 2738I User s Manual 4 23 4 7 Chipset This menu controls the advanced features of the onboard Northbridge and Southbridge ...

Page 50: ...ration Primary Graphics Adapter Select which graphics controller to use as the primary boot device The choice IGD PCIe IGD Integrated Graphics Mode Selec Select the amount of system memory used by the internal graphics device The choice Disabled Enabled 1MB Enabled 4MB Enabled 8MB ...

Page 51: ...CRT External LVDS Local Flat Panel Scaling The choice Auto Forced Scaling Disabled Flat Panel Type The choice 640x480 generic 800x600 generic 1024x768 generic 640x480 NEC 8 4 800x600 NEC 9 1024x600 TMD 5 61 1024x600 Samsung 4 8 1024x768 Samsung 15 1280x768 Sharp 7 2 1280x800 Samsung 15 4 DPST Control The choice VBIOS Default DPST Disabled DPST Enabled at Level 1 Level 5 ...

Page 52: ...bled 2 USB Ports 4 USB Ports 6 USB Ports USB 2 0 Controller Set to Enabled if you need to use any USB 2 0 device in the operating system that does not support or have any USB 2 0 driver installed such as DOS The choice Enabled Disabled USB Client Controller The choice Enabled Disabled SDIO controller The choice Enabled Disabled Audio Controller Codec The choice Auto Azalia Disabled ...

Page 53: ...the power status of using ATX power supply after a serious power loss occurs The choice Power Off Power On Last State Serial IRQ Mode The choice Continuous Quiet PCIE Port 0 The choice Auto Enabled Disabled PCIE Port 1 The choice Auto Enabled Disabled 4 8 Exit This menu allows you to load the BIOS default values or factory default settings into the BIOS and exit the BIOS setup utility with or with...

Page 54: ...up Utility Discard Changes and Exit Abandon all changes and exit the Setup Utility Discard Changes Abandon all changes and continue with the Setup Utility Load Optimal Defaults Use this menu to load the default values set by the SBC manufacturer specifically for optimal performance of the SBC Load Failsafe Defaults Use this menu to load the default values set by the BIOS vendor for stable system p...

Page 55: ...es and connected all the device cables required before turning on DC 12V power 200 pin DDR2 SO DIMM keyboard mouse 44pin hard disk VGA connector device power cables 12V DC power accessories are good examples that deserve attention With no assurance of properly and correctly accommodating these modules and devices it is very possible to encounter system failures that result in malfunction of any de...

Page 56: ...ter Setup the selected IDE port and its access mode to Auto This will force system to automatically pick up the IDE devices that are being connected each time system boots up Improper disable operation There are too many occasions where users disable a certain device feature in one application through BIOS setting These variables may not be set back to the original values when needed These devices...

Page 57: ...M2 IRQ 4 COM1 IRQ 5 Usable IRQ IRQ 6 Diskette Event IRQ 7 Usable IRQ IRQ 8 CMOS Clock IRQ 9 Usable IRQ IRQ 10 Usable IRQ IRQ 11 Usable IRQ IRQ 12 PS 2 mouse IRQ 13 Data Processor IRQ 14 IDE Controller IRQ 15 Usable IRQ It is then very easy to find out which IRQ resource is ready for additional peripherals If IRQ resource is not enough please disable some devices listed above to release further IRQ...

Page 58: ...anel you will use on PEB 2738I series different panel will connect to different connector LVDS interface is CN10 Question How can I change COM port to RS 232 RS 422 RS 485 mode Answer You can short JP5 pin header to change RS 232 RS 422 RS 485 mode JP5 COM1 CN19 Top Interface Selection JP5 Function 5 6 9 11 10 12 15 17 16 18 Short RS 232 Ì 3 4 7 9 8 10 13 15 14 16 21 22 Short RS 422 1 2 7 9 8 10 1...

Page 59: ...Memory Area Size Device Description 0000 003F 1K Interrupt Area 0040 004F 0 3K BIOS Data Area 0050 006F 0 5K System Data 0070 0E2E 54K DOS 0E2F 0F6B 5K Program Area 0F6C 9EFF 574K Available Conventional memory ends at 639K 9F00 9F7F 2K Unused 9F80 9FFF 2K Extended Bios Area A000 AFFF 64K VGA Graphics B000 B7FF 32K Unused B800 BFFF 32K VGA Text C000 CE5F 57K Video ROM CE60 EFFF 134K Unused F000 FFF...

Page 60: ...ROM System Timer IRQ 1 System ROM Keyboard Event IRQ 2 Unassigned Usable IRQ IRQ 3 System ROM COM 2 IRQ 4 System ROM COM 1 IRQ 5 Unassigned Usable IRQ IRQ 6 System ROM Diskette Event IRQ 7 Unused Usable IRQ IRQ 8 System ROM Real Time Clock IRQ 9 Unassigned Usable IRQ IRQ 10 Unassigned Usable IRQ IRQ 11 Unassigned Usable IRQ IRQ 12 System ROM IBM Mouse Event IRQ 13 System ROM Coprocessor Error IRQ ...

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