Polaroid SprintScan SS35, Repair Manual

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Slide Scanner Repair Manual Functional Description
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as three FIFO buffers. The FIFO buffers are used for color realignment as well as a
transfer buffer. In the event that the scanned image requires less than full buffer
capacity, the FIFO buffer will be used for preview purposes as well, and may be
re-transferred out, through the color correction circuitry multiple times to preview the
effects of the post-processing.
All resolution and area of interest reductions takes place before buffering, so no more of
the buffer than necessary will be taken up for realignment.
The primary color correction ASIC controls the DRAM controller as specified by
programmed parameters from the microcontroller.
Data is loaded into the buffer one color at a time, typically with a line of red followed by a
line of green and then a line of blue. The red, green and blue images are each imaging a
separate vertical section of the object. Initial acquisition and storage of the first color is
offset from the second and third to compensate for the misalignment. Once the re-
alignment slack is taken up in the scan, data is fed from the buffer to the secondary color
processing ASIC in coherent RGB color triplets. The data rate through the color
processor is regulated by the SCSI transfer rate, so the buffer takes up the slack
between the data generation rate out of the synchronous CCD and primary color
correction ASIC, and then into the host computer controlled SCSI port. The
microcontroller monitors how full the buffer is and then throttles the data-in rate via the
block scan, or stop-start mode as necessary to prevent overflow.
Secondary Color Correction ASIC
The secondary color correction ASIC uses a proprietary algorithm to essentially perform
three dimensional color correction, processing, and space transform. The unit takes re-
aligned primary-corrected RGB color triplets and first performs a three dimensional color
correction operation. The corrected RGB triplets are then transformed into a luminance-
chrominance space for subsequent luminance-only sharpening. Following sharpening,
the luminance and chrominance may be transformed back into RGB or any number of
other color spaces.
Color correction, processing, and space transformation parameters are all fully
programmable to allow custom manipulation of the data to standard device-independent
color spaces or device optimized color spaces for specific printers, monitors, etc.
The processor may be run in a stop/start mode without corrupting data in its pipeline.
The processor is slave driven by the primary color correction ASIC, linked to the SCSI
data rate demands. It requires temporary storage SRAM for four (4) lines of luminance
and two (2) lines of each chrominance channel at 8-bit data width. The nominal design
accommodates up to 4K pixels per line.