PLX PCI-Proto Lab/PLX-S, Technical Manual

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2.1. PCI9030 from PLX Technology
The PLX PCI9030 is a 32-bit, 33-MHz PCI Bus general purpose PCI Target device. It acts as
a PCI bridge between the PCI bus and the user circuits. The PLX pci9030 handles all of the
PCI signaling and software interfacing and translates the PCI bus cycles to a simple control,
address, data general interface for easy connectivity of memory and I/O devices.
It has two interfaces for this purpose which are designated as following:
−
the PCI bus interface
−
the Local bus interface
The interfaces of the PCI controller are of varying importance for the user of
PCI-Proto LAB/PLX-S
and they are described next.
2.1.1. The PCI Bus Interface
The PCI bus interface serves the purpose of coupling the controller to the PCI bus. It’s inter-
face is completely wired with the PCB edge connector on
PCI-Proto LAB/PLX-S. The user
needs no effort.
2.1.2. Local bus Interface
The Local bus interface is important for the user because this is where the switching applica-
tions are connected. It is universally designed and allows the operation of hardware periphery
with data bus ranges of 8, 16 or 32bits. Local bus interface supports up to 32bits of local data
and up to 28bits of latched local addresses.
User specific systems control the data exchange effectively through the local bus interface
with the aid of classical signals such as /ALE, /LBEx, LAx, /READY, /WAIT or /LW/RD.
The periphery connected to it may consist of a microprocessor system or, in the simplest case,
be formed as a data latch.
The construction of the PCI controller also supports the integration of memories. It is possible
to address up to 256 Mbytes memory or up to 256 Bytes I/O per local address space where
four user specific local address spaces are possible.
Application specific chip selects and general purpose I/O pins are available to make user de-
signs easier and help to keep the peripheral hardware costs low.
PCI9030 chip has a set of registers to store initializing data, to effect the settings, to activate
and deactivate the operating modes and to exchange data.
For BIOS expansion you may connect ROM's with parallel interface to PCI9030.
PCI-Proto LAB/PLX-S uses a serial EEPROM with a size of 2 Kbytes which is installed on
the PCB. It contains configuration data for the controller and may be edit and overwritten
with
PlxMon software program delivered with PLX SDK .
There is also the possibility of generating interrupts from the local side as well as the PCI
side.