XV-DV360
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Audio Interface (28)
No.
Name
Alt.
I/O
Function
204 SPMCLK
SCLK0
Inout
Non-pull
Audio DAC master clock of SPDIF input
While SPDIF input is not used:
Serial interface port 0 clock pin
GPIO
205 SPDATA
SDIN0
Inout
Non-pull
Audio data of SPDIF input
While SPDIF input is not used:
Serial interface port 0 data-in
GPIO
206 SPLRCK
SDO0
Inout
Non-pull
Audio left/right channel clock of SPDIF input
While SPDIF input is not used:
Serial interface port 0 data-out
GPIO
207 SPBCK
SDCS0
Inout
Non-pull
Audio bit clock of SPDIF input
While SPDIF input is not used:
Serial interface port 0 chip select
GPIO
209 ALRCK
Inout
4MA, PD, SMT
Audio left/right channel clock
Trap value in power-on reset:
1 : use external 373
0: use internal 373
210 ABCK
Fs64
Output
4MA, Non-pull
Audio bit clock
Phase de-modulation
211 ACLK
Inout, 4MA,
Non-pull
Audio DAC master clock
197 ASDATA0
Inout, 4MA,
PD SMT
Audio serial data 0 (Front-Left/Front-Right)
Trap value in power-on reset :
1 : manufactory test mode
0 : normal operation
While using external channels:
GPO_2
202 ASDATA1
Inout, 4MA,
PD SMT
Audio serial data 1 (Left-Surround/Right-Surround)
Trap value in power-on reset :
1 : manufactory test mode
0 : normal operation
While using external channels:
GPO_1
203 ASDATA2
Inout, 4MA,
PD SMT
Audio serial data 2 (Center/LFE)
Trap value in power-on reset :
1 : manufactory test mode
0 : normal operation
While using external channels:
GPO_0
212 ASDATA3
Inout, 4MA,
PD SMT
Audio serial data 3 (Center-back/ Center-left-back/Center-right-back, in 6.1 or
7.1 mode)
Trap value in power-on reset :
1 : manufactory test mode
0 : normal operation
While only 2 channels output:
GPIO
214 ASDATA4
INT1#
Inout, 4MA,
PD SMT
Audio serial data 4 (Down-mixed Left/Right)
Trap value in power-on reset :
1 : manufactory test mode
0 : normal operation
While only 2 channels output:
Microcontroller external interrupt 1
GPIO
215 MC_DATA
INT2#
Inout
PD SMT
Microphone serial input
While not support Microphone:
Microcontroller external interrupt 2
GPIO
216 SPDIF
Output, 2-16MA,
SR : ON/OFF
Non-pull
SPDIF output
217 APLLVDD3
Power
3.3V Power pin for audio clock circuitry
218 APLLCAP
Analog Inout
APLL External Capacitance connection
Summary of Contents for XV-DV360
Page 33: ...XV DV360 33 5 6 7 8 5 6 7 8 C D F A B E ...
Page 34: ...XV DV360 34 1 2 3 4 1 2 3 4 C D F A B E 3 11 POWER SUPPLY UNIT AC IN G ...
Page 38: ...XV DV360 38 1 2 3 4 1 2 3 4 C D F A B E ...
Page 49: ...XV DV360 49 5 6 7 8 5 6 7 8 C D F A B E CN3 SIDE B SIDE B POWER SUPPLY UNIT G G G CN1 CN2 ...