Pioneer VSX-D511-K, Service Manual

Page: 72 / 78

VSX-D511-K
72
1 2 3 4
1 2 3 4
C
D
F
A
B
E
7
Pin Function
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
7
Block Diagram
Pin / Function
No. Pin Name I/O Function
1
MCLK I
Master Clock Input Pin
An external TTL clock should be input on this pin.
2
BICK I
Audio Serial Data Clock Pin
3 SDTI I
Audio Serial Data Input Pin
4 LRCK I
L/R Clock Pin
5 PDN I
Power-Down Mode Pin
When at ì Lî , the AK4382 is in the power
- down mode and is held in reset.
The AK4382 should always be reset upon power- up.
6 CSN I Chip Select Pin
7 CCLK I Control Data Input Pin
8 CDTI I Control Data Input Pin
9 AOUTR- O Rch Negative Analog Output Pin
10 AOUTR+ O Rch Positive Analog Output Pin
11 AOUTL - O Lch Negative Analog Output Pin
12 AOUTL+ O Lch Positive Analog Output Pin
13 VSS - Ground Pin
14 VDD - Power Supply Pin
15 DZFR O Rch Data Zero Input Detect Pin
16 DZFL O Lch Data Zero Input Det ect Pin
Note: All input pins should not be left floating.
LRCK
BICK
SDTI
Audio
Data
Interface
MCLK
PDN
∆Σ
Modulator
AOUTL+
8X
Interpolator
SCF
AOUTR+
SCF
VDD
VSS
De-emphasis
Control
µ
P
Interface
Clock
Divider
CSN
CCLK
CDTI
DZFR
∆Σ
Modulator
8X
Interpolator
AOUTL-
AOUTR-
DZFL
7
AK4382AVT (DD & INPUT ASSY : IC9102)
• D/A Converter IC