PDP-507XD
200
1
2
3
4
1
2
3
4
C
D
F
A
B
E
Pin Function
2.13 Digital image input/output terminal
Acronyms
Terminal number
I/O
Level
Buffer type
PU/PD [k
Ω
]
Functions
FDIO0-FDIO9
112,113,116,
117,118,119,
121,122,123,
124
I/O
LVTTL
3-state
digital connection.
6 mA
Digital 8/10 bit Cb, Cr output/input at the time of
µ
PD64031A
It will become Hi-Z when FDIOS[2:0] (SA22h, D6-D4)=000b.
Leave it open when not in use.
ROCK
101
O
LVTTL
3-state
6 mA
Clock for digital ITU-R BT.656/component output.
ROY0-ROY13
100,99,97,96,
95,94,91,90,
87,86,85,84,
83,82
O
LVTTL
3-state
6 mA
Digital ITU-R BT.656/component output.
Digital RGB component (8 bit) output
ROFDIE
79
I
LVTTL
–
Image input/output terminal output enable.
The state of ROY[13:0], ROCK, HD, VD, VBLK, FILD
and RDEO terminals is controlled.
L: Output terminal Hi-Z, H: Output enable
Normally, pull up to 3.3V.
2.14 timing output terminal
Acronyms
Terminal number
I/O
Level
Buffer type
PU/PD [k
Ω
]
Functions
HD
105
O
LVTTL
3-state
3 mA
Horizontal sync signal output
VD
106
O
LVTTL
3-state
3 mA
Vertical sync signal output
VBLK
107
O
LVTTL
3-state
3 mA
V blanking output
FILD
108
O
LVTTL
3-state
3 mA
Field output
RDEO
110
O
LVTTL
3-state
3 mA
Effective pixel range output
Summary of Contents for PDP-507XA
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Page 44: ...PDP 507XD 44 1 2 3 4 1 2 3 4 C D F A B E 4 2 OVERALL CONNECTION DIAGRAM 2 2 ...
Page 45: ...PDP 507XD 45 5 6 7 8 5 6 7 8 C D F A B E ...
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Page 78: ...PDP 507XD 78 1 2 3 4 1 2 3 4 C D F A B E 500ns div 500ns div 200ns div ...
Page 191: ...PDP 507XD 191 5 6 7 8 5 6 7 8 C D F A B E Block Diagram R2S11002AFT MAIN ASSY IC4701 AV SW ...