PDP-505HD
29
A
B
C
D
5
6
7
8
5
6
7
8
16bit
×
2
(IC#21)
205
+3.3V
IC2151
(PE5062A)
IC2201
(PE5064A)
DRIVE SEQUENCE
PATTERN GEN.
IC2601
(PE5063A)
SUB FIELD
CONVERSION
R
ADR
BUFFER
IC2901–IC2910
IC3001–IC3010
IC3301–IC3304
IC3308, IC3309
IC3311, IC3312
IC2701
(PE5063A)
SUB FIELD
CONVERSION
G
R
W
DATA
ARRANGE
DATA
CONVERT
CONT
(IC#22)
IC2801
(PE5063A)
SUB FIELD
CONVERSION
B
Q605
IC601
Q554
IC551
IC2602
(HY58163210TQ-10)
16M SGRAM
IC2603
(HY58163210TQ-10)
16M SGRAM
IC2702
(HY58163210TQ-10)
16M SGRAM
IC2703
(HY58163210TQ-10)
16M SGRAM
IC2802
(HY58163210TQ-10)
16M SGRAM
IC2803
(HY58163210TQ-10)
16M SGRAM
+3.3V
R
W
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
40
40
40
RDAT
GDAT
BDAT
+3.3V
CN3252
CN3256
D9
D4
TP2154
TP2155
VACANT
To Panel U-com
VLD_A
VLD_B
FIELD
RA/RB
GA/GB
BA/BB
H
V
R
G
B
BLK
3
6
8
CD
50M
25M
3
IC3101
X DRIVE BUFFER
XSUS-B/U/D/G
XPR, XR
IC3102–IC3104
Y DRIVE BUFFER
X3202
50MHz
OSC
SGRAM • READ OUT
MASTER CLOCK
X3201
62MHz
OSC
1/2
To X DRIVE ASSY
CN3402
F7
To Y DRIVE ASSY
CN3751
H1
To ADDRESS MODULE
+5V
+3.3V
CN551
D16
8
25
ADR/LBLK
MN (X Drive Gen. Pulse)
EF/GH/IJ (Y Drive Gen. Pulse)
24
TP601
TP553
D555
Digital P.D.
D605
Q551
Q552
TP555
+5V OVP
TP604
+3.3V OVP
REG
REG
ABL
γ
–1
Dither
LUT
DATA
ARRANGE
DATA
CONVERT
CONT
SYNC
CONT
(IC#22)
R
W
DATA
ARRANGE
DATA
CONVERT
CONT
(IC#22)
(IC#23)
YSUS-B/U/D/G
SI, MSK, CLK, PFS,
OE, YNR, YR
D6
+
+
+12V
D556
Q553
TP556
+5V UVP
Q601
Q602
D606
TP603
+3.3V UVP
Q603
Summary of Contents for PDP-505HD
Page 5: ...PDP 505HD 5 ...
Page 45: ...PDP 505HD 45 ...
Page 46: ...PDP 505HD 46 A B C D 1 2 3 4 1 2 3 4 3 11 OVERALL CONNECTION DIAGRAM 1 2 ADX2643 ...
Page 47: ...PDP 505HD 47 A B C D 5 6 7 8 5 6 7 8 ADX2643 ADX2643 ADX2643 ADX2643 ADX2643 ...
Page 49: ...PDP 505HD 49 A B C D 5 6 7 8 5 6 7 8 ADX2643 ADX2643 ADX2643 ADX2643 ...
Page 51: ...PDP 505HD 51 A B C D 5 6 7 8 5 6 7 8 AUTO ZOOM BLOCK ...