CX-3164
5
5
7
8
5
6
7
8
C
D
F
A
B
E
13
6
A+C
B+C
VREF
13
6
10k
10k
8.8k
10k
10k
8.8k
61.0k
61.0k
111k
R2
15.2k
15.2k
35k
20k
11.2k
7.05k
10k
10k
124
127
125
126
122
120
121
116
136
135
RFOFF setup
FEOFF setup
VREF
VREF
A
B
C
D
RFO
AGCI
RF2-
RF-
EQ2
EQ1
AGCO
FEO
FE-
FE A/D
118
119
+
-
+
-
+
-
+
-
+
-
+
-
-
+
P3
P7
P9
P2
P4
P8
Pickup Unit
CD CORE UNIT
UPD63763CGJ
4.7k
5.6k
1.2k
1.2k
22p
56p
4p
123
For RFOK generation
To DEFECT/A3T detection
1.1.2 RF and RFAGC amplifiers
The output from the photo-detector (A + C) and (B + D) is provided from the RFO terminal as the RF signal (which can be
used for eye-pattern check), after it is added, amplified, and equalized inside this LSI. The low frequency component of
the voltage RFO is calculated as below.
RFO = (A + B + C + D) x 2
The RFO is used for the FOK generation circuit and RF offset adjustment circuit.
The RFO signal, output from the pin 119, is A/C-coupled externally, input to the pin 118, and amplified in the RFAGC
amplifier to obtain the RFAGC signal.
Also, this LSI is equipped with the RFAGC auto-adjustment function, explained below, which switches feedback gains of
the RFAGC amplifier so that the RFO output will be 1.5 V.
This RFO signal is also used for the EFM, DFCT, MIRR, and RFAGC auto-adjustment circuits.
Fig.1.1.2 RF/AGC/FE
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