DEH-P980BT/XN/UC
104
1
2
4
1
2
3
4
C
D
F
A
B
E
AVDD
AVSS
BVSS
DVDD
DVSS
SDOUT5
SDOUT4
SDOUT3
SDOUT2
SDOUT1
SWIRPT
SWG1
SWG0
SWQ5
SWQ4
SWQ3
SWQ2
SWQ1
OUT5E_N
OUT4E_N
OUT3E_N
OUT2E_N
OUT1E_N
RQ/CAD1
SCLK/SCL
SI/CAD0
SO
RDY
SDA
STO
EESI
EECK
EECS
EESO
XTI
XTO
CLKO2
CLKO1
CLKO2E_N
CLKO1E_N
EESI
EECK
EECS
EESO
EEST
EESEL
TESTI1
TESTI2
INIT_RESET
S_RESET
CK_RESET
CKM[3:0]
I2CSEL
LFLT
BITCLK_I
LRCLK_I
EESEL
CRC_E
EEPIL
CONTROLLER
SMODE
(Master="L",Slave="H")
JX0
JX1
JX2
DSP
JX0_E
JX1_E
JX2_E
PLL&DIVIDER
SDIN5A/JX0
SDIN4/JX1
SDIN3/JX2
SDIN2/JX0
SDIN1
SDIN5
SDIN4
SDIN3
SDIN2
SDIN1
SDOUT5
SDOUT4
SDOUT3
SDOUT2T
SDOUT1T
TEST
GPO1
GPO0
RQ/CAD1
SCLK
SI/CAD0
SO
RDY
SDA
WDT
CRC
SWAD_N
SDATA_AD
AINL+ AINL- AINR+ AINR-
VREFL VCOM VREFH
ADC
REF
5
5
2
2
2
4
-
Block Diagram
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