DEH-P55BT/XN/EW5
65
5
6
7
8
5
6
7
8
C
D
F
A
B
E
6.5 SYSTEM MICROCOMPUTER TEST PROGRAM
-
PCL Output
In the normal operation mode (with the detachable panel installed, the ACC switched ON, the standby mode
cancelled), shift the STEST1 (Pin 86) terminal to H.
The clock signal is output from the PCL1 terminal (Pin 37).
The frequency of the clock signal is 468.75kHz that is one 32th of the fundamental frequency.
The clock signal should be 468.75kHz
±
19Hz.
If the clock signal is out of the range, the X'tal (X601) should be replaced with new one.
Summary of Contents for DEH-P55BT/XN/EW5
Page 5: ...DEH P55BT XN EW5 5 5 6 7 8 5 6 7 8 C D F A B E 1 SPECIFICATIONS ...
Page 6: ...DEH P55BT XN EW5 6 1 2 3 4 1 2 3 4 C D F A B E ...
Page 7: ...DEH P55BT XN EW5 7 5 6 7 8 5 6 7 8 C D F A B E ...
Page 10: ...DEH P55BT XN EW5 10 1 2 3 4 1 2 3 4 C D F A B E 2 2 EXTERIOR ...
Page 12: ...DEH P55BT XN EW5 12 1 2 3 4 1 2 3 4 C D F A B E 2 3 CD MECHANISM MODULE ...
Page 33: ...DEH P55BT XN EW5 33 5 6 7 8 5 6 7 8 C D F A B E ...
Page 87: ...DEH P55BT XN EW5 87 5 6 7 8 5 6 7 8 C D F A B E 8 OPERATIONS ...
Page 88: ...DEH P55BT XN EW5 88 1 2 3 4 1 2 3 4 C D F A B E ...
Page 89: ...DEH P55BT XN EW5 89 5 6 7 8 5 6 7 8 C D F A B E ...
Page 90: ...DEH P55BT XN EW5 90 1 2 3 4 1 2 3 4 C D F A B E ...
Page 92: ...DEH P55BT XN EW5 92 1 2 3 4 1 2 3 4 C D F A B E CONNECTION DIAGRAM ...
Page 93: ...DEH P55BT XN EW5 93 5 6 7 8 5 6 7 8 C D F A B E ...