Pioneer BONUS VIEW BDP-51FD, Service Manual

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BDP-51FD
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5. DIAGNOSIS
5.1 POWER ON SEQUENCE
Pressing of the PO W ER key is detected by the IC4001 Submicrocomputer on the MAI N Assy.
The IC4001 then outputs a PO W ER_O N signal to the SYPS Assy.
[1] Power On Se q uence
After receiving the PO W ER_O N signal, the SYPS Assy activates, secondary
Power[S W +12 V ], setting it to O N .
Communication between the R 8 A34019BG and the DDR2 SDRAM starts.
[2] Troubleshootin g
Are the pins at C N 7001 and C N 7002 supplied with voltages?
MAI N ASSY(1/10) V +3S, V +3PLL with 3.3 voltages?
MAI N ASSY(1/10) V +1R 8 S with 1. 8 voltages?
MAI N ASSY(1/10) V +1R1S with 1.1 voltages?
Is the reset signal H? (R1161)
Is the 27 MHz CLK oscillating? (R1141)
Power O N , and log of R 8 A34019BG stops with [DRAM failed].
R 8 A34019BG and communication failure of DDR memory.
Power O N , and log of R 8 A34019BG stops with [zboot failed].
R 8 A34019BG and communication failure of FLASH memory.
Communication between the R 8 A34019BG and the FLASH_IC starts.
It takes about 1 minute to complete the startup process.
The R 8 A34019BG (IC1001), the core LSI, starts up. {RS-232C connectorC N 1601,
log it to O N }