Circuit Diagrams and PWB Layouts
10.
10-3-3
B03, CI, Ethernet, Nand
19420_506_1
3
0
3
12.ep
s
1
3
0
3
12
CI, Ethernet, N
a
nd
B03
B03
2012-12-17
2
17m
b
95
s
CI, Ethernet, N
a
nd
T
S
1_VLD
C4
22
u
6V
3
CI_PWR
R
3
20
4k7
TP209
S
221
X10
24MHz
3
1
4
2
2V5_VCC
TP
3
2
16V
100n
C20
TP109
1
TP115
ETH_GRN
ETH_YEL
R1
3
4
510R
R1
3
7
510R
CN10
14
1
3
12
11
8
7
10
9
6
1
5
4
3
2
TD-
TCT
RD+
RD-
TD+
RCT
GR+
GR-
NC1
NC2
YL+
YL-
S
HLD1
S
HLD2
ETH_TXN
ETH_TXP
C21
100n
16V
R170
47R
R169
47R
ETH_RXN
ETH_RXP
16V
C22
100n
R172
47R
47R
R171
CN9
6
8
67
66
65
64
6
3
62
61
60
59
5
8
57
56
55
54
5
3
52
51
50
49
4
8
47
46
45
44
4
3
42
41
40
3
9
38
3
7
3
6
3
5
3
4
33
3
2
3
1
3
0
29
2
8
27
26
25
24
2
3
22
21
20
19
1
8
17
16
15
14
1
3
12
11
10
9
8
7
6
5
4
3
2
1
33
R
R50
3
UART-RX-
S
C
R150
4k7
UART-TX-
S
C
3
V
3
_
S
TBY
3
V
3
_
S
TBY
R151
4k7
4k7
R152
T
S
1CLK
T
S
1_CLK
R504
33
R
U10
MX25L512
1
2
3
4
5
6
7
8
VCC
HOLD#
S
CLK
S
I
GND
WP#
S
O
C
S
#
U4
M
S
D
8
WB9BX
U21
Y1
8
AA20
T21
AB19
AD21
AB1
8
AC19
AD20
Y19
AE21
AC20
AB20
AB17
AD19
AE20
W22
AB16
V21
AA22
T20
W19
R20
Y22
AA21
AD1
8
AA19
AE1
8
AC1
8
AE17
AB21
AD22
V20
C1
C2
B1
B2
A2
P20
Y21
P22
P21
AC21
Y20
W20
R21
NF_ALE
NF_WPZ
NF_CEZ
NF_CLE
NF_REZ
NF_WEZ
NF_RBZ
NF_CEZ1
S
PI_CK
S
PI_DI
S
PI_DO
TE
S
T1
S
PI_CZ
PCM_D[0]/NF_AD[0]
PCM_D[1]/NF_AD[1]
PCM_D[2]/NF_AD[2]
PCM_D[
3
]/NF_AD[
3
]
PCM_D[4]/NF_AD[4]
PCM_D[5]/NF_AD[5]
PCM_D[6]/NF_AD[6]
PCM_D[7]/NF_AD[7]
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[
3
]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
PCM_A[
8
]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_A[1
3
]
PCM_A[14]
PCM_IRQA_N
PCM_OE_N
PCM_IORD_N
PCM_CE_N
PCM_WE_N
PCM_CD_N
PCM_R
S
T
PCM_REG_N
PCM_IOWR_N
PCM_WAIT_N
4
100n
10V
C9
8
26
25
24
2
3
22
21
20
19
1
8
17
16
15
14
1
3
12
11
10
9
8
7
6
5
4
3
2
1
U1
3
NAND12
8
-A
4
8
47
46
45
44
4
3
42
41
40
3
9
38
3
7
3
6
3
5
3
4
33
3
2
3
1
3
0
29
2
8
27
NC1
NC2
NC
3
NC4
NC5
NC6
RB
R
E
NC7
NC
8
VDD1
V
SS
1
NC9
NC10
CL
AL
W
WP
NC11
NC12
NC1
3
NC14
NC15
NC16
NC17
NC1
8
NC19
I/O0
I/O1
I/O2
I/O
3
NC20
NC21
NC22
V
SS
2
VDD2
NC2
3
NC24
NC25
I/O4
I/O5
I/O6
I/O7
NC26
NC27
NC2
8
NC29
R240
10k
S
PI_CLK
S
PI_DI
S
PI_DO
3
V
3
_
S
TBY
NAND_ALE
NAND_WPZ
NAND_CEZ
NAND_CLE
NAND_REZ
NAND_WEZ
NAND_RBZ
S
PI_CLK
S
PI_DI
S
PI_DO
S
PI_C
S
4k7
R15
3
3
V
3
_
S
TBY
3
V
3
_
S
TBY
FLA
S
H_WP
R505
33
R
NAND_REZ
3
V
3
_
S
TBY
33
R
R506
R507
33
R
R50
8
33
R
33
R
R509
3
V
3
_NAND
NAND_CEZ
NAND_RBZ
3
k9
R574
3
V
3
_NAND
NAND_CLE
NAND_ALE
NAND_WEZ
NAND_WPZ
33
R
R577
1
2
3
4
5
6
7
8
R4
R1
R
3
R2
R57
8
33
R
1
2
3
4
5
6
7
8
R4
R1
R
3
R2
33
R
R579
1
2
3
4
5
6
7
8
R4
R1
R
3
R2
R5
8
0
33
R
1
2
3
4
5
6
7
8
R4
R1
R
3
R2
3
V
3
_NAND
3
V
3
_VCC
C291
100n
16V
C292
16V
100n
F51
60R
3
V
3
_NAND
PCMNANDD0
PCMNANDD1
PCMNANDD2
PCMNANDD
3
PCMNANDD4
PCMNANDD5
PCMNANDD6
PCMNANDD7
PCMA0
PCMA1
PCMA2
PCMA
3
PCMA4
PCMA5
PCMA6
PCMA7
PCMA
8
PCMA9
PCMA10
PCMA11
PCMA12
PCMA1
3
PCMA14
PCMWAIT
PCMOE
PCMIORD
PCMCE
PCMWE
PCMCD2
PCMR
S
T
PCMREG
PCMIOWR
PCMWAIT
PCMNANDD2
PCMNANDD1
PCMNANDD0
PCMA0
PCMR
S
T
PCMA5
PCMA4
PCM_IOWR
PCMNANDD6
PCMNANDD5
PCMNANDD4
PCMNANDD
3
PCMA1
PCMA2
PCMA
3
PCMREG
33
R
R5
8
1
1
2
3
4
5
6
7
8
R4
R1
R
3
R2
R5
8
2
33
R
1
2
3
4
5
6
7
8
R4
R1
R
3
R2
33
R
R5
83
1
2
3
4
5
6
7
8
R4
R1
R
3
R2
R5
8
4
33
R
1
2
3
4
5
6
7
8
R4
R1
R
3
R2
PCMNANDD7
PCMCE
PCMA10
PCMIORD
PCMA6
PCMA7
PCMIRQA
PCMA12
PCMWE
PCMA14
PCMA1
3
PCMA
8
PCMA9
PCMIOWR
PCMA11
PCMOE
33
R
R510
PCM_CD2
PCM_NAND_D2
PCM_NAND_D1
PCM_NAND_D0
PCM_A0
PCM_NAND_D6
PCM_NAND_D5
PCM_NAND_D4
PCM_NAND_D
3
PCM_A1
PCM_A2
PCM_A
3
PCM_REG
PCM_IORD
PCM_A4
PCM_A5
PCM_R
S
T
PCM_A6
PCM_A7
PCM_WAIT
PCM_A12
PCM_WE
PCM_A14
PCM_A1
3
PCM_A
8
PCM_A9
PCM_IOWR
PCM_A11
PCM_OE
PCM_IORD
PCM_A10
PCM_CE
PCM_NAND_D7
PCMCD2
PCM_NAND_D0
PCM_NAND_D1
PCM_NAND_D2
PCM_NAND_D
3
PCM_NAND_D4
PCM_NAND_D5
PCM_NAND_D6
PCM_NAND_D7
PCM_NAND_D
3
PCM_NAND_D4
PCM_NAND_D5
PCM_NAND_D6
PCM_NAND_D7
PCM_NAND_D2
PCM_NAND_D1
PCM_NAND_D0
PCM_A0
PCM_A1
PCM_A2
PCM_A
3
PCM_A4
PCM_A5
PCM_A6
PCM_A7
PCM_A12
PCM_A10
PCM_A11
PCM_A9
PCM_A
8
PCM_A1
3
PCM_A14
PCM_CE
PCM_OE
PCM_WE
PCMIRQA
R154
4k7
CI_PWR
TP211
CI_PWR
TP64
1
10V
100n
C99
1
2
C100
100n
10V
1
2
5V_VCC
60R
F15
B
S
H10
3
Q
3
0
1
2
3
12V_VCC
47k
R
3
16
1
2
10V
100n
C101
1
2
R
3
17
47k
1
2
BC
8
47B
Q
3
1
1
2
3
CI_PWR_CTRL
10V
10
u
C
3
R242
10k
1
2
CI_PWR
CI_PWR
T
S
1_VLD
T
S
1_CLK
PCM_CD1
PCM_CD2
PCM_IRQA
PCM_IRQA
PCM_R
S
T
4k7
R155
CI_PWR
PCM_WAIT
PCM_REG
T
S
0D0
T
S
1D5
T
S
1_D5
33
R
R5
8
5
8
7
6
5
4
3
2
1
R4
R1
R
3
R2
T
S
1D7
T
S
1D6
T
S
1_D7
T
S
1_D6
T
S
0D1
T
S
0D2
T
S
0D
3
T
S
0D4
T
S
0D5
T
S
0D6
T
S
0D7
T
S
0CLK
T
S
0VLD
T
S
0
S
YNC
T
S
1
S
YNC
T
S
1VLD
T
S
1CLK
T
S
1D7
T
S
1D6
T
S
1D5
T
S
1D4
T
S
1D
3
T
S
1D2
T
S
1D1
T
S
1D0
U4
M
S
D
8
WB9BX
Y14
Y15
AB15
AA15
AB14
AA14
AA1
3
Y1
3
AA16
AA17
Y16
AD1
3
AE15
AC16
AC17
AD17
AD16
AC15
AD15
AE14
AD14
AC14
R25
R24
P24
R2
3
R4
P5
G4
AE2
AE
3
N5
RE
S
ET
XIN
XOUT
IRIN
DDCA_CK/UART0_RX
DDCA_DA/UART0_TX
UART
3
_RX/GPIO64
UART
3
_TX/GPIO65
DDCR_CK
DDCR_DA
T
S
1_D[0]
T
S
1_D[1]
T
S
1_D[2]
T
S
1_D[
3
]
T
S
1_D[4]
T
S
1_D[5]
T
S
1_D[6]
T
S
1_D[7]
T
S
1_CLK
T
S
1_VLD
T
S
1_
S
YNC
T
S
0_D[0]
T
S
0_D[1]
T
S
0_D[2]
T
S
0_D[
3
]
T
S
0_D[4]
T
S
0_D[5]
T
S
0_D[6]
T
S
0_D[7]
T
S
0_CLK
T
S
0_VLD
T
S
0_
S
YNC
8
T
S
0_
S
YNC
T
S
0_CLK
T
S
0VLD
T
S
0
S
YNC
T
S
0CLK
C44
8
10p
50V
T
S
0_VLD
T
S
0_D0
33
R
R5
8
7
8
7
6
5
4
3
2
1
R4
R1
R
3
R2
T
S
0D2
T
S
0D1
T
S
0D0
T
S
0_D1
T
S
1_D4
T
S
0_D2
T
S
1D
3
T
S
1D4
T
S
1VLD
R5
88
33
R
8
7
6
5
4
3
2
1
R4
R1
R
3
R2
T
S
1_D
3
T
S
1_D2
T
S
1D2
T
S
0D7
T
S
0_D7
T
S
0_D
3
T
S
0_D4
T
S
0_D5
T
S
0_D6
T
S
1_
S
YNC
33
R
R5
8
9
8
7
6
5
4
3
2
1
R4
R1
R
3
R2
T
S
1D1
T
S
1D0
T
S
1
S
YNC
T
S
1_D1
T
S
1_D0
T
S
0D4
T
S
0D5
T
S
0D6
R590
33
R
8
7
6
5
4
3
2
1
R4
R1
R
3
R2
T
S
0_D4
T
S
0_D6
T
S
0_D5
T
S
0_D
3
T
S
0D
3
T
S
0_D7
T
S
1_
S
YNC
T
S
1_D0
T
S
1_D1
T
S
1_D2
T
S
1_D
3
T
S
0_VLD
T
S
0_
S
YNC
T
S
0_D0
T
S
0_D1
T
S
0_D2
T
S
1_D4
T
S
1_D5
T
S
1_D6
T
S
1_D7
T
S
0_CLK
50V
10p
C
3
7
8
R24
3
10k
10k
R244
3
V
3
_VCC
3
V
3
_VCC
S
65
R
3
95
1M
33
p
C
3
90
50V
50V
C
3
91
33
p
4k7
R156
1
2
R157
4k7
1
2
3
V
3
_VCC
S
Y
S
_
S
CL
S
Y
S
_
S
DA
12p
C
3
92
50V
RE
S
ET
C102
100n
10V
1
2
3
V
3
_
S
TBY
R245
10k
22
u
C
3
94
16V
R
33
1
1k
1N414
8
D
3
10V
100n
C10
3
2
1
RE
S
ET
R
3
61
100R
1
2
R
3
62
100R
1
2
IR_IN
6V
3
220
u
C149
1N5
8
19
D5
4k7
R76
R1
8
4
4k7
3
V
3
_VCC
4k7
R716
R7
3
5
4k7
3
V
3
_VCC
3
V
3
_VCC
4k7
R
8
0
8
R5
8
6
33
R
50V
10p
C451
TP110
1
TP116
TP11
3
TP114
TP117
C127
1
u
16V
60R
F52
75R
R
8
76
D
3
6
C5V6
1
2
C210
22
u
6V
3
TP210
R
8
77
75R
75R
R
8
7
8
R
8
79
75R
75R
R
88
0
R
88
1
75R
75R
R
88
2
R
883
75R
10V
10
u
C1197
M
S
TAR
S
PI FLA
S
H
RE
S
ET
Pl
a
ce the
s
e c
a
p
a
citor
s
clo
s
e to tr
a
n
s
former
nc
Pl
a
ce the
s
e re
s
i
s
tor
s
CI/NAND
clo
s
e to M
S
TAR
Ethernet line
s
m
us
t
b
e 100ohm differenti
a
l p
a
ir
s
clo
s
e to M
S
TAR
ch
ass
i
s
gro
u
nd.
tr
a
n
s
former.
a
ny p
a
rt
s
or tr
a
ce
s
u
nder the
differenti
a
l p
a
ir
s
. Do not pl
a
ce
ro
u
te
as
m
a
tched length
Al
s
o keep tr
a
ce
s
s
hort
a
nd
s
peed net
s
, except for the
Pl
a
ce the
s
e re
s
i
s
tor
s