Block Diagrams, Test Point Overview, and Waveforms
EN 56
SDI PDP 2K6
6.
6.
Block Diagrams, Test Point Overview, and Waveforms
Index of this chapter:
6.1 Block Diagram for Drive Circuits
6.2 Block Diagram for Logic Circuit
6.3 PSU
6.3.1 PSU Layout, Display Types 42" SD v5, 42" HD w1, and
50" HD w1
6.3.2 PSU Layout, Display Type 63" HD v4
6.3.3 Voltage Level Overview 42" SD v5
6.3.4 Voltage Level Overview 42" HD w1
6.3.5 Voltage Level Overview 50" HD w1
6.3.6 Voltage Level Overview 63" HD v4
6.1
Block Diagram for Drive Circuits
Figure 6-1 Block diagram X-Main Board
Figure 6-2 Block diagram Y-Main Board
Sustain
(Xr, Xf,
Xs, Xg)
Each
Voltage
from SMPS
Drive signal
from logic
X-bias
(Xe)
X-out
Sustain
(Xr, Xf,
Xs, Xg)
Each
Voltage
from SMPS
Drive signal
from logic
X-bias
(Xe)
X-out
G_16380_218.eps
190606
DC-DC
(Vsch, Vccf)
Sustain
(Yr, Yf,
Ys, Yg)
Rising ramp
(Yrr)
falling ramp
(Yfr)
Scan period
(Ysc)
Drive signal
from logic
Each
Voltage
from SMPS
Y-out
DC-DC
(Vsch, Vccf)
Sustain
(Yr, Yf,
Ys, Yg)
Rising ramp
(Yrr)
falling ramp
(Yfr)
Scan period
(Ysc)
Drive signal
from logic
Each
Voltage
from SMPS
Y-out
G_16380_219.eps
190606
