IC Data Sheets
8
.
8
.5
Diagram
, AP1117ELA (IC U46)
Figure
8
-5 Internal block diagram and pin configuration
Block Dia
g
ram
Pin Confi
g
uration
1
8
4
3
0_
3
01_090204.ep
s
090204
NAME
I/O
PIN #
FUNCTION
Adj (GND)
I
1
A re
s
i
s
tor divider from thi
s
pin to the V
o
u
t
pin
a
nd gro
u
nd
s
et
s
the o
u
tp
u
t volt
a
ge
(Gro
u
nd only for Fixed-Mode).
V
o
u
t
O 2
The o
u
tp
u
t of the reg
u
l
a
tor. A minim
u
m of 10
u
F c
a
p
a
citor (0.15? ? E
S
R ? 20? )
m
us
t
b
e connected from thi
s
pin to gro
u
nd to in
su
re
s
t
ab
ility.
V
in
I
3
The inp
u
t pin of reg
u
l
a
tor. Typic
a
lly
a
l
a
rge
s
tor
a
ge c
a
p
a
citor (0.15? ? E
S
R ? 20? )
i
s
connected from thi
s
pin to gro
u
nd to in
su
re th
a
t the inp
u
t volt
a
ge doe
s
not
sa
g
b
elow the minim
u
m dropo
u
t volt
a
ge d
u
ring the lo
a
d tr
a
n
s
ient re
s
pon
s
e. Thi
s
pin
m
us
t
a
lw
a
y
s
b
e 1.
3
V higher th
a
n V
o
u
t
in order for the device to reg
u
l
a
te properly.
3
Therm
a
l
S
h
u
tdown
1
2
V
o
u
t
Adj
1.25V
+
+
CURRENT
LIMIT
V
in
-
+
+
1
GND
(FIXED)
-
