Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 147
Q528.1E LA
9.
9.10.3 Diagram B02A, NCP5422AD (IC 7U00)
Figure 9-25 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
F_15400_129.eps
240505
V
CC
Set
Dominant
IS+1
PWM
Comparator 1
PWM
Comparator 2
Reset
Dominant
CURRENT
SOURCE
GEN
BST
FAULT
BIAS
FAULT
R
S
R
S
R
S
RAMP1
GATE(H)1
5.0 A
0.425 V
0.25 V
COMP1
−
+
−
+
−
+
−
+
−
+
−
+
−
+
−
+
−
+
COMP2
V
FB1
RAMP2
FAULT
FAULT
Reset
Dominant
GATE(L)1
GATE(H)2
GATE(L)2
GND
V
CC
BST
V
CC
RAMP1
RAMP2
CLK1
CLK2
OSC
0.425 V
1.0 V
E/A2
E/A OFF
E/A1
E/A OFF
R
OSC
Q
1.2 mA
V
FB2
1.0 V
V
CC
−
+
−
+
IS−1
IS+2
IS−2
− +
− +
8.6 V
70 mV
70 mV
BST
7.8 V
FAULT
FAULT
non−overlap
non−overlap
A
= Assembly Location
WL
= Wafer Lot
Y
= Year
WW = Work Week
V
FB1
COMP1
IS+1
GATE(H)1
GATE(L)1
GND
BST
IS−1
1
16
GATE(H)2
GATE(L)2
V
CC
R
OSC
IS+2
IS−2
V
FB2
COMP2
W
W
Y
L
W
A
A
2
2
4
5
P
C
N
SO−16
