Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 122
Q528.1E LA
9.
9.
Circuit Descriptions, Abbreviation List, and IC Data
S
heets
Index of this chapter:
9.1 Introduction
9.2 Display Supply
9.3 On-Board Platform Supply
9.4 On-board DC/DC Converters
9.5 Front-End
9.6 PNX8535
9.7 Back-end
9.8 Ambient Light
9.9 Abbreviation List
9.10 IC Data Sheets
Notes:
•
Only
new
circuits (circuits that are not published recently)
are described.
•
Figures can deviate slightly from the actual situation, due
to different set executions.
•
For a good understanding of the following circuit
descriptions, please use the wiring, block (chapter 6) and
circuit diagrams (chapter 7). Where necessary, you will find
a separate drawing for clarification.
9.1
Introduction
This chassis (development name “TV520“) is the successor of
the BJx.x and FJx.x chassis (development name “Jaguar”).
The platform is built around the PNX8535 “System on Chip”
(SoC), which performs the video and audio processing. The
SoC
integrates
the functionality of ICs that were previously
used in the Jaguar platform: PNX2015 (AVIP/COLUMBUS),
PNX3000 (MPIF), TDA9975 (HDMI receiver), T6TE0TBG
(SPIDER), and PNX8550 (VIPER).
Remaining additional key components in this chassis are:
•
PNX5050.
•
PACIFIC 3 (T6TF4HFG).
9.1.1
Features
The main features for this chassis are:
•
1080p resolution @ 50 Hz (in some sets)
•
Perfect Pixel HD Engine as the successor of Pixel Plus.
With this technology, each pixel of the incoming picture is
enhanced to better match the surrounding pixels, resulting
in a more natural picture. Artifacts and noise in all sources
from multimedia to standard TV to highly-compressed
high-definition (HD) are detected and reduced. This results
in a clean and razor sharp image.
•
The introduction of LED AmbiLight.
•
ClearLCD, a technology that uses scanning and backlight
dimming technology to reduce the motion blur on an LCD
screen, caused by the slow response time and the “sample
and hold” characteristic of LCD.
•
Dynamic Frame Insertion (DFI) (in some sets) resulting in
a 1080p resolution @ 100 Hz, thus eliminating the film
flicker caused by the frame rate of 24 frames per second of
cinematic film.
•
Digital Natural Motion (DNM) to compensate the judder
(perceived when watching a moving object on the screen),
caused as side-effect during frame insertion (DFI) as
described above.
9.1.2
TV520 Architecture Overview
For details about the chassis block diagrams refer to chapter
“Block diagrams, Test Point Overview, and Waveforms”. An
Figure 9-1 Architecture of TV520 platform
3
8
Flat di
s
play:
1
3
66x76
8
@100Hz
1920x10
8
0p@100Hz
Flat di
s
play:
1
3
66x76
8
@100Hz
1920x10
8
0p@100Hz
Audio Amp.
TDA1004
8
DVB-T
PNX505x
HD-NM,
Clear LCD 100 Hz
OR
Upconver
s
ion to
10
8
0p q 50Hz
DDR
MUX
max.
3
HDMI
TD1716
Tuner/Saw
PNX
8
5
3
5
MIPS
3
2@250MHz
TV Control,
Audio/video decodin
g
Analo
g
and di
g
ital
Platform Picture quality,
Scalin
g
DDR-II
DDR
DDR-II
Pacific
3
Picture
Quality
feature
s
FLASH
MASTER IF
DDR
EPLD
Ambient
Li
g
ht
DDR
Optional: Dynamic Frame In
s
ertion (DFI)
Conver
s
ion 60Hz to 120Hz Q10
8
0p
EPLD DFI@10
8
0p
DDR
DDR
DUAL LVDS
1
3
66x76
8
p@100Hz
DUAL LVDS
T6TF4HF6
1920x10
8
0P@50Hz
QUAD LVDS
1920x10
8
0P@100Hz
H_16770_101.ep
s
260
3
07
