Philips DVDR3408, Service Manual

Page: 30 / 71

1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
E E
F F
(NC)
1.8V
(Reset_Audio and BTSC)
(FP
SCLK)
(To J11 Reserve)
(RDY
_FM)
(BIO_PHY_PD)
(MUTE)
(FP D_HOST)
Caps with smaller capacitance values to be
closer to respective power pins compared to
those of larger values. All should be as
close as possible.
(/RST_PHY)
(Input Only)
(Ain_Sel1)
(NC)
(VO_I/P)
(INT_VI)
3.3V
(ATN
_FM)
2.5V
(Ain_Sel2)
(/ETHER_IRQ)
(NC)
General decoupling cap placement:
5V
E5_SDR
AM_CS1
(/RST_VI)
(POWER DOWN LOADER)
(VO_MUTE2)
(To Scart)
(VI_AVID)
(FP
D_FM)
C145 B1
C146 E4
C147 F3
C148 F3
C149 F3
C152 F3
C151 F3
C150 F3
C155 F5
C158 F5
C157 F5
C162 F5
C159 F5
C160 F5
C156 F5
C161 F5
C171 F4
C163 C1
C166 F5
C176 F3
C165 F5
C173 F3
C185 D7
C186 D7
C175 F3
C170 F4
C167 F5
C187 E1
C174 F3
C168 F5
C164 F5
C169 F4
FB120 C7
C263 F2
C188 E1
C191 E2
CA37 E1
C267 F4
C275 F5
C278 F3
C277 F3
C190 E2
C264 F3
C268 F4
C276 F5
C269 F4
C273 F4
C266 F4
C404 C7
CA27 C7
D19 E2
C262 F2
D18 E2
C192 E2
C270 F5
C272 F4
C274 F5
C265 F3
C193 E2
C189 E1
C205 F4
L1 D7
L2 D7
L4 D7
L3 D7
R136 A1
R137 A1
R138 A1
R139 A2
R140 B7
R142 B7
R148 B7
R146 B1
R155 B5
R149 B7
R169 D1
R165 B6
R170 D1
R172 D1
R173 D1
R174 B7
R175 B7
R176 B7
R177 B7
R178 B7
R180 B7
R179 B7
R183 B2
R182 B2
R184 B2
R185 B2
R186 B2
R187 B2
R188 B2
R190 B2
R191 B2
R192 B2
R197 E5
R365 B7
R418 B6
R419 D1
R450 B7
R451 B6
RX2 B7
TX2 B7
U27 C4
Y3 B1
E5_GPIOx1
E5_GPI
Ox
41
E5_SD
R
AM
_A6
/WAIT
E5_SD
R
AM
_A9
VI_D9
E5_GPIO6
E5_SD
R
AM
_D
Q
7
E5_SD
R
AM
_A2
MCONFIG
CLKX
TCK
E5_SD
R
AM
_D
Q
8
HD14
E5_GPIOx7
TDO
/DTACK
E5_GPIOx2
E5_SD
R
AM
_A3
HD11
E5_SD
R
AM
_D
Q
3
TRST_L
E5_SD
R
AM
_D
Q
18
E5_SD
R
AM
_A5
HD7
AIMCLKO
E5_SD
R
AM
_D
Q
24
HD1
E5_GPIOx4
VI_D8
HD2
E5_GPIO3
E5_SD
R
AM
_D
Q
17
VI_D3
E5_GPI
Ox
25
HD8
AOMCLKO
TCK
TMS
HD4
E5_SD
R
AM
_A15
/E5_CS2
E5_GPIO2
TDI
E5_SD
R
AM
_D
Q
2
VI_CLK0
VI_D6
E5_SD
R
AM
_D
Q
15
E5_GPIOx35
E5_SD
R
AM
_D
Q
5
E5_SD
R
AM
_D
Q
21
E5_SD
R
AM
_D
Q
13
E5_SD
R
AM
_A11
AIFSYNC
E5_GPIO4
E5_SD
R
AM
_A8
AO_3
CLKI
VI_D2
AISCLK
E5_GPIOx3
E5_SD
R
AM
_D
Q
25
E5_SD
R
AM
_D
Q
29
VI_D5
E5_GPIO1
AOIEC
HD0
E5_GPIOx4
E5_SD
R
AM
_D
Q
27
AOSCLK
E5_GPIOx3
E5_GPIO2
TMS
E5_SD
R
AM
_A12
HD5
E5_SD
R
AM
_D
Q
31
E5_SD
R
AM
_D
Q
16
E5_SD
R
AM
_D
Q
11
E5_UART2_TX
E5_GPI
Ox
42
E5_SD
R
AM
_A7
E5_SD
R
AM
_D
Q
19
AO_1
/WAIT
E5_SD
R
AM
_D
Q
26
E5_GPIO1
TDI
E5_GPIO5
E5_SD
R
AM
_D
Q
23
HD15
E5_SD
R
AM
_A10
HD12
E5_SD
R
AM
_D
Q
12
E5_GPIOx0
E5_SD
R
AM
_D
Q
30
E5_SD
R
AM
_D
Q
6
E5_SD
R
AM
_A14
E5_SD
R
AM
_D
Q
28
E5_SD
R
AM
_D
Q
22
E5_GPIO0
TDO
VI_D4
AO_2
HD13
AO_0
E5_SD
R
AM
_A1
/DTACK
/E5_CS2
HD9
E5_GPIOx2
E5_GPIOx6
/E5_CS1
TRST_L
VI_D0
VI_D1
E5_GPIO3
E5_GPIO4
AOFSYNC
E5_SD
R
AM
_D
Q
9
E5_SD
R
AM
_D
Q
4
E5_UART2_RX
E5_SD
R
AM
_D
Q
1
E5_GPIOx5
E5_SD
R
AM
_D
Q
14
VR
EF
E5_SD
R
AM
_D
Q
10
E5_SD
R
AM
_D
Q
20
E5_SD
R
AM
_A0
E5_GPIOx5
HD6
E5_GPIO5
E5_GPI
Ox
24
E5_GPIOx1
E5_SD
R
AM
_D
Q
0
/E5_CS0
E5_SD
R
AM
_A4
HD3
VI_D7
MCONFIG
E5_GPIO0
VI_VSYNC
HD10
AtapiAddr4
E5_I
R
T
X1
E5_SD
R
AM
_A12
E5_GPIOx35
E5_ALE
E5_SD
R
AM
_A4
E5_GPIOx2
E5_SD
R
AM
_A6
ATAPI_INTRQ
E5_SD
R
AM
_A3
ATAPI_DIOR_L
Y_Out
ATAPI_DATA0
AI_MCLKO
BI
O_PH
Y_D
AT
A0
E5_MA3
E5_GPIO4
BI
O_PH
Y_D
AT
A5
AO_SCLK
/E5_UDS
E5_GPIOx7
ATAPI_DATA9
E5_GPIOx3
E5_SD
R
AM
_A14
ATAPI_DMARQ
SC
L
E5_SD
R
AM
_A2
E5_SD
R
AM
_D
Q
S0
ATAPI_DATA5
C_Out
BI
O_PH
Y_C
T
L0
E
5
_
S
DRA
M_
DQ
M1
E5_SD
R
AM
_D
Q
S1
ATAPI_DATA12
ATAPI_DATA4
BI
O_PH
Y_D
AT
A6
E5_SD
R
AM
_A9
VR
EF
E
5
_
S
DRA
M_
DQ
M2
BI
O_PH
Y_D
AT
A2
E5_GPIO0
AI_SCLK
E5_MA5
E5_MA4
/E5_OE
Pr/R_Out
AI_D0
ATAPI_DATA1
E5_/DTACK
/SYS_RST
ATAPI_DATA2
BI
O_PH
Y_D
AT
A1
E5_SD
R
AM
_D
Q
S2
AO_D2
ATAPI_DATA6
E
5
_
S
DRA
M_
DQ
M3
ATAPI_DATA11
E5_U
AR
T
2_R
X
E5_MA22
AO_MCLKO
E5_GPIOx5
ATAPI_DATA13
BI
O_PH
Y_D
AT
A3
E5_SD
R
AM
_C
LKE
U
SB_D
0-
ATAPI_DATA14
E5_SD
R
AM
_A15
E5_GPIO3
/E5_CS1
BI
O_PH
Y_C
T
L1
BI
O_PH
Y_D
AT
A4
SD
A
E5_MA1
E5_SD
R
AM
_A5
/WAIT
BI
O_LI
N
K_ON
E
5
_
S
DRA
M_
RA
S
#
AtapiAddr3
E5_GPIO6
E5_SI
O_I
R
R
X
ATAPI_DATA7
ATAPI_DATA15
VI_VSYNC
U
SB_OC
0
HD[15..0]
AO_D0
AO_IEC958
ATAPI_DATA10
E5_GPIOx32
E5_SD
R
AM
_A8
Pb/B_Out
E5_GPIO2
BI
O_LPS
/E5_WEL
VI_D[9..0]
E5_GPIOx33
ATAPI_IORDY
ATAPI_DMAACK_L
AtapiAddr1
U
SB_D
0+
E
5
_
S
DRA
M_
CA
S
#
AO_D3
AtapiAddr0
ATAPI_RESET
AtapiAddr2
E5_GPIOx6
E5_GPIOx1
E5_GPIO1
E5_SD
R
AM
_C
LK1
E5_GPIOx4
E5_GPI
Ox
41
E5_SD
R
AM
_A0
E
5
_
S
DRA
M_
DQ
M0
U
SB_PO0
E5_SD
R
AM
_C
LK#0
E5_SD
R
AM
_C
LK#1
E5_GPIO5
E5_SPI
_M
OSI
/E5_CS0
E5_SPI
_M
ISO
E5_GPI
Ox
42
E5_GPI
Ox
25
ATAPI_DATA3
E5_SPI
_C
S2
E5_GPIOx0
ATAPI_DATA8
E5_SPI
_C
LK
E5_SD
R
AM
_C
LK0
VI_CLK0
E5_SDRAM_DQ[31..0]
AO_D1
E5_SD
R
AM
_A7
E5_SD
R
AM
_W
E#
E5_GPI
Ox
24
AI_FSYNC
E5_MA2
BI
O_PH
Y_D
AT
A7
E5_SD
R
AM
_C
S0
AO_FSYNC
E5_SD
R
AM
_A1
ATAPI_DIOW_L
CVBS_Out
E5_U
AR
T
2_T
X
E5_SD
R
AM
_A10
Y/G_Out
E5_SD
R
AM
_D
Q
S3
BI
O_LR
EQ
E5_SD
R
AM
_A11
BI
O_PH
Y_C
LK
GND
GND GND
E5_AVDD
VCC
GND
GND
SSTL2_VDD
E5_VDDREF
V33
VO_GND
GND
GND
V33_E5_USB
GND
GND
E5_V5BIAS E5_VPAD
V33_E5_DAC_AVDD
GND
GND
VO_GND
GND
GND
V18
E5_VPAD
E5_VCORE
GND
E5_VDDX
SSTL2_VDD
E5_AVDD
E5_VDDX
V18_E5_DAC_DVDD
V18_E5_DAC_DVDD
E5_VCORE
E5_AVDD
V33_E5_USB
V33
GND
GND
GND
E5_VDDX
E5_VDDREF
V25
E5_V5BIAS
SSTL2_VDD
E5_VDDREF
GND
V33
E5_VCORE
V33_E5_DAC_AVDD
E5_VPAD
V33
GND
GND
R365 10K
Y3
13.5MHZ
C158
0.1UF
R177 10K
R136
10K
R140 10K
R146 10K
C163
15P
R139
10K
R179 10K
C159
0.1UF
SKT-U2
SKT-BGA388
R137
10K
C146
0.1UF
L3 2.7UH/0805
C145
15P
R138
10K
R188 22
C160
0.1UF
C152
0.1UF
C161
0.1UF
R148 10K
D18
IN4148
1
2
R190 22
C187
0.1UF
R450 10K
C162
0.1UF
C277
0.01UF
R191 22
C404
0.1UF
R172 10K
C278
1000PF
+
CA27
47UF/10V
+
C165
10UF/6V/A
ADDR
DATA
SIO
SDRAM I/F
RST-
MASTER SLAVE
MCONFIG
CS-
RD-
DMAREQ
A0
A1
A2
HINT-
RD
WAIT-
DTACK-
D31
D30
D29
D28
D27
D26
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D4
D3
D2
D1
D0
UDS-
LDS-
PCMCIA_IOW-
PCMCIA_IOR-
WR-
D25
D24
D23
D22
D21
D20
D19
D18
MA[21]
MA[20]
MA[19]
MA[18]
MA[17]
MA[16]
MA[15]
MA[14]
MA[13]
MA[12]
MA[11]
MA[10]
MA[9]
MA[8]
MA[7]
MA[6]
CONTROL
ATAPI2 I/F
ATAPI I
/
F
SD/CD
SBP
SBP_D[7]
SBP_D[6]
SBP_D[5]
SBP_D[4]
SBP_D[3]
SBP_D[2]
SBP_D[1]
SBP_D[0]
SD_ERROR
SD_SECSTART
SBP_CLK
SBP_REQ
SBP_RD
SBP_ACK
SBP_FRAME
SD_D[0]
SD_D[1]
SD_D[2]
SD_D[3]
SD_D[4]
SD_D[5]
SD_D[6]
SD_D[7]
SD_CLK
SD_ACK
SD_RDREQ
SD_WRREQ
DATA ADDR CONTROL
IDC UART1 UART2 SPI IR
CS10- CS11-
GPIOx[25] GPIOx[24] GPIO
x[42]
GPIOx[41]
CS7-
GPIO
x[39]
GPIOx[40] GPIO
x[38]
GPIOx[37]
HOST I/F
VDENC
0 1 2
CPST Y -
C CPST -
G/Y Y -
B/Pb C CPST
R/Pr C CPST
SEL
PEC
GPIOx[45]
GPIOx[29]
2nd 24-bit
VI_D0
VI_D1
VI_D2
VI_D3
VI_D4
VI_D5
VI_D6
VI_D7
VI_D8
VI_D9
VO_D16
VO_D17
VO_D18
VO_D19
VO_D20
VO_D21
VO_D22
VO_D23
VIO
GPIOx[30]
GPIOx[0]
GPIOx[1]
GPIOx[2]
GPIOx[3]
GPIOx[4]
GPIOx[5]
GPIOx[6]
GPIOx[7]
GPIOx[8]
GPIOx[9]
GPIOx[10]
GPIOx[11]
GPIOx[12]
GPIOx[13]
GPIOx[14]
GPIOx[15]
VOUT
VIN
JTAG
SYSTE
M
GPIOx[31]
GPIOx[34]
GPIO[7]
GPIO[6]
AIN
AOUT
GPIOx[35]
CS[9]-
CS[8]-
USB 1394 POWER GND
PADS CORE
SDRAM
SDR
DDR
3.3V
2.5V 5V
BIAS
3.3V 1.8V 3.3V
PLL PLL
VREF
GPIOx[43] GPIOx[44]
DACO
GPIO
x[36]
CS6
-
GPIOx[23]
GPIOx[22]
GPIOx[21]
GPIOx[20]
GPIOx[19]
GPIOx[18]
GPIOx[17]
GPIOx[16]
CD_DATA
CD_LRCK
CD_BCK
CD_C2PO
vout vin
Y CPST -
TOP VIEW
3.3V ONLY
2nd
VO_D0
VO_D7
VO_D6
VO_D5
VO_D4
VO_D3
VO_D2
VO_D1
vout
VI_D10
VI_D11
VI_D12
VI_D13
VI_D14
VI_D15
20-bit
vin
POWER
3.3V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
3.3v only
GND
DIGITAL
GPIOx[33]
GPIOx[32]
VI_D16
VI_D17
VI_D18
VI_D19
E5.1-BGA-308-A
J2
V15
L2 L4 L3 J1 K4 K3 K2 J3 K1 N1 M1 J4 L1 H4 D1
5
C1
5
N1
2
N1
3
J5 K5 E11 E12 T1
2
T1
1
L5 M5 T9 T1
0
E9 E10 D1
9
C1
6
D1
7
J1
6
K16 L16 M1
6
C1
7
H8 H9 H1
0
H1
1
H1
2
H1
3
J8 J9 J1
0
J1
1
J1
2
J1
3
K8 K9 K10 K11 K12 K13 L8 L9 L10 L11 L12 L13 M8 M9 M1
0
M1
1
M1
2
M1
3
N8 N9 N1
0
N1
1
W3
Y2
Y6
Y4
Y5
Y3
V4
V5
W4
U5
W5
U6
W7
W6
U7
V7
V10
W11
Y10
V9
V11
Y12
W10
W12
Y13
U11
V13
W13
Y14
U12
U13
W14
G2
Y1
T2
W1
T3
V2
U3
R2
V3
T4
V1
U2
U4
W2
U1
R4
R1
P3
P1
N2
M2
M3
M4
N3
N4
P2
P4
R3
T1
Y8
Y9
W15
V14
V12
W9
V8
V6
W8
Y7
U10
U9
Y18 Y17 U1
6
V18 Y19 U1
7
U1
5
W1
9
W1
7
W1
8
W1
6
V16 Y16 Y15 U1
4
C4 E4 D3 D2 E2 C3 D4 E3 D1 F2 C2 C1 B1
N2
0
M1
9
M1
8
M1
7
L19 L18 L17 K18 G20 J1
9
J1
8
H1
7
H1
9
H1
8
J1
7
K17 G19 G18 G17 F1
8
F1
7
E19 E18 E17 A18 B18 A20 A19 B20 C1
9
B19 C2
0
M2
0
K19 J2
0
F1
9
C1
8
H2
0
F2
0
D1
8
R1
7
T1
9
P17 R1
9
R1
8
T1
8
T2
0
V20 U1
9
W2
0
U1
8
V19 U2
0
Y20 R2
0
P20 N1
7
N1
8
N1
9
L20 K20 E20 D2
0
D1
6
A17
B15
B16
B17
B14
A14
B13
A13
C14
D14
A12
D13
C13
E1
F1
H1
G1
B7
A7
C6
B6
D6
B10
C10
B11
C11
D11
D10
B12
C12
D12
A11
A10
A9
D7
C7
D8
C8
B8
D9
C9
B9
A8
P19 P18
G3 G4 H2 H3
A1
B5
A2
B4
A3
A4
B2
A5
B3
Y11
U8
A16
A15
D5
C5
A6
F3 F4 T1
7
V17
BI
O_PH
Y_D
AT
A0
IRRX
BI
O_PH
Y_D
AT
A1
BI
O_PH
Y_D
AT
A2
BI
O_PH
Y_D
AT
A3
BI
O_PH
Y_D
AT
A4
BI
O_PH
Y_D
AT
A5
BI
O_PH
Y_D
AT
A6
BI
O_PH
Y_D
AT
A7
BI
O_PH
Y_C
T
L0
BI
O_PH
Y_C
T
L1
BI
O_LR
EQ
BI
O_LPS
BI
O_LI
N
K_ON
BI
O_PH
Y_C
LK
VD
D
_PAD
1
5V_BI
AS0
VSS_PC
2_C
T
R
1
VSS_PC
2_C
T
R
37
VSS_PC
2_C
T
R
38
VD
D
_PAD
2
VD
D
_PAD
3
VD
D
_PAD
4
VD
D
_PAD
5
VD
D
_PAD
6
VD
D
_PAD
7
V
DD_
CO
RE
1
V
DD_
CO
RE
2
V
DD_
CO
RE
3
V
DD_
CO
RE
4
V
DD_
CO
RE
5
V
DD_
CO
RE
6
V
DD_
CO
RE
7
VD
D
_25V1
VD
D
_25V2
VD
D
_25V3
VD
D
_25V4
VD
D
_25V5
VD
D
_25V6
VSS_PC
2_C
T
R
2
VSS_PC
2_C
T
R
3
VSS_PC
2_C
T
R
4
VSS_PC
2_C
T
R
5
VSS_PC
2_C
T
R
6
VSS_PC
2_C
T
R
7
VSS_PC
2_C
T
R
8
VSS_PC
2_C
T
R
9
VSS_PC
2_C
T
R
10
VSS_PC
2_C
T
R
11
VSS_PC
2_C
T
R
12
VSS_PC
2_C
T
R
13
VSS_PC
2_C
T
R
14
VSS_PC
2_C
T
R
15
VSS_PC
2_C
T
R
16
VSS_PC
2_C
T
R
17
VSS_PC
2_C
T
R
18
VSS_PC
2_C
T
R
19
VSS_PC
2_C
T
R
20
VSS_PC
2_C
T
R
21
VSS_PC
2_C
T
R
22
VSS_PC
2_C
T
R
23
VSS_PC
2_C
T
R
24
VSS_PC
2_C
T
R
25
VSS_PC
2_C
T
R
26
VSS_PC
2_C
T
R
27
VSS_PC
2_C
T
R
28
VSS_PC
2_C
T
R
29
VSS_PC
2_C
T
R
30
VSS_PC
2_C
T
R
31
VSS_PC
2_C
T
R
32
VSS_PC
2_C
T
R
33
VSS_PC
2_C
T
R
34
VSS_PC
2_C
T
R
35
VSS_PC
2_C
T
R
36
CS5-
CS4-
CS3-
CS2-
CS1-
CS0-
MA[26]
MS[25]
MA[24]
MA[23]
MA[22]
MA[5]
MA[4]
MA[3]
MA[2]
MA[1]
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MCONFIG
ATAPI_RESET_L
ATAPI_DMAACK_L
ATAPI_DMARQ
ATAPI_IORDY
ATAPI_INTRQ
ATAPI_DIOR_L
ATAPI_DIOW_L
AtapiAddr0
AtapiAddr1
AtapiAddr2
AtapiAddr3
AtapiAddr4
ATAPI_DATA15
ATAPI_DATA14
ATAPI_DATA13
ATAPI_DATA12
ATAPI_DATA11
ATAPI_DATA10
ATAPI_DATA9
ATAPI_DATA8
ATAPI_DATA7
ATAPI_DATA6
ATAPI_DATA5
ATAPI_DATA4
ATAPI_DATA3
ATAPI_DATA2
ATAPI_DATA1
ATAPI_DATA0
ALE
OE-
RST-
UWE-
GPIO1
GPIO2
GPIO3
GPIO0
GPIO4
LWE-
GPIO5
DTACK-
IDC_
CL
K
IDC_
DA
T
UA
RT2
_
RX
UA
RT2
_
T
X
UA
RT1
_
RX
UA
RT1
_
T
X
UA
RT1
_
C
TS
UA
RT1
_
R
TS
SPI
_M
OSI
SPI
_M
ISO
SPI
_C
S0
SPI
_C
S1
SPI
_C
S2
SPI
_C
LK
IRTX
1
A
V
DD1
A
V
DD2
A
V
DD0
A
V
DD3
V
DDX
A
G
ND1
A
G
ND2
A
G
ND0
A
G
ND3
GN
D
X
V
DD_
RE
F
R_
RE
F
VSS_R
EF
S
DRA
M_
DQ
2
S
DRA
M_
DQ
1
S
DRA
M_
DQ
0
S
DRA
M_
DQ
3
S
DRA
M_
DQ
4
S
DRA
M_
DQ
5
S
DRA
M_
DQ
6
S
DRA
M_
DQ
7
S
DRA
M_
DQ
1
5
S
DRA
M_
DQ
9
S
DRA
M_
DQ
1
2
S
DRA
M_
DQ
1
4
S
DRA
M_
DQ
1
0
S
DRA
M_
DQ
1
3
S
DRA
M_
DQ
1
1
S
DRA
M_
DQ
8
S
DRA
M_
DQ
1
6
S
DRA
M_
DQ
1
7
S
DRA
M_
DQ
1
8
S
DRA
M_
DQ
1
9
S
DRA
M_
DQ
2
0
S
DRA
M_
DQ
2
1
S
DRA
M_
DQ
2
2
S
DRA
M_
DQ
2
3
S
DRA
M_
DQ
2
4
S
DRA
M_
DQ
2
5
S
DRA
M_
DQ
2
7
S
DRA
M_
DQ
2
6
S
DRA
M_
DQ
2
8
S
DRA
M_
DQ
2
9
S
DRA
M_
DQ
3
0
S
DRA
M_
DQ
3
1
S
DRA
M_
DQ
S
0
S
DRA
M_
DQ
M0
S
DRA
M_
DQ
S
1
S
DRA
M_
DQ
S
2
S
DRA
M_
DQ
S
3
S
DRA
M_
DQ
M1
S
DRA
M_
DQ
M2
S
DRA
M_
DQ
M3
SD
R
AM
__A0
SD
R
AM
__A1
SD
R
AM
__A2
SD
R
AM
__A3
SD
R
AM
__A4
SD
R
AM
__A5
SD
R
AM
__A6
SD
R
AM
__A7
SD
R
AM
__A8
SD
R
AM
__A9
SD
R
AM
__A10
SD
R
AM
__A11
SD
R
AM
__A12
*SD
R
AM
__A13
SD
R
AM
__A14
SD
R
AM
__A15
S
DRA
M_
CA
S
_
L
S
DRA
M_
RA
S
_
L
S
DRA
M_
CK
E
S
DRA
M_
WE
_
L
S
DRA
M_
CL
K
0
SD
R
AM
_C
LK_L0
S
DRA
M_
CL
K
1
SD
R
AM
_C
LK_L1
SD
R
AM
_VR
EF
AO_D0
AO_D1
AO_D2
AO_D3
AO_SCLK
AO_FSYNC
AO_IEC958
AO_MCLKI
AI_D0
AI_D1
AI_SCLK
AI_FSYNC
AI_MCLKI
CLKI
CLKX
CLKO
BYPASS_PLL
TCK
TDI
TDO
TMS
TRST_L
VI_D0
VI_D1
VI_D2
VI_D3
VI_D4
VI_D5
VI_D6
VI_D7
VI_D8
VI_D9
VI_VSYNC0
VI_CLK0
VO_D0
VO_D1
VO_D2
VO_D3
VO_D4
VO_D5
VO_D6
VO_D7
VO_CLK
SD
R
AM
__A17
SD
R
AM
__A16
Dp
lu
s_
0
D
m
inus
_0
H
os
t_PO_0
Ho
st_
O
C_
0
DAC1
DAC0bar
DAC2
DAC1bar
DAC3
DAC4
DAC_Vdd0(3.3v)
DAC5
DAC_Vdd1(3.3v)
CS0_8BIT
WAIT-
AI_MCLKO
AO_MCLKO
DAC_Dvdd (1.8v)
DAC_Dvss
DAC6
U
SB_Av
dd0(3.
3v
)
U
SB_VSS0
V
DD_
CO
RE
8
V
DD_
CO
RE
9
R452 22
R170 10K
R142 10K
+
C164
10UF/6V/A
L4 2.7UH/0805
D19
IN4148
1
2
R451 22
R183 22
R197
1.
2K 1%
R182 22
R181 22
C273
0.1UF
C170
1000PF
L2 2.7UH/0805
R169 10K
C169
1000PF
C272
0.01UF
R418 22
R192 22
+
C192
10UF/6V/A
R184 22
R165 22
R185 22
C171
1000PF
R186 22
+
C185
10UF/6V/A
C191
0.01UF
+
C205
10UF/6V/A
C186
0.1UF
L1 2.7UH/0805
C148
0.1UF
C176
0.1UF
C190
0.1UF
R149 10K
C268
1000PF
+
C156
10UF/6V/A
R173 10K
C149
0.1UF
C189
0.1UF
R419 10K
+
C265
10UF/6V/A
C267
1000PF
+
C155
10UF/6V/A
C266
1000PF
C274
0.1UF C173
0.1UF
C151
0.1UF
C188
0.01UF
C150
0.1UF
C275
0.1UF
C263
1000PF
C193
0.1UF
+
CA37
100UF/10V
C276
0.1UF
C262
1000PF
R155 22
R175 10K
C166
0.1UF
TX2
1
C264
1000PF
FB120
FBMJ2125HS420-T
C167
0.1UF
R176 10K
C147
0.1UF
R178 10K
C168
0.1UF
R174 10K
C270
0.01UF
C175
0.01UF
RX2
1
C269
0.01UF
R187 22
R180 10K
C157
0.1UF
C174
0.01UF
6-11 6-11
DVDR3408/93 Main Board Eletrical Diagram: E5.1 BGA308-SS
Title:E5.1 BGA308-SS
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