Circuit Diagrams and PWB Layouts
7.
Small Signal Board: Feature Box
MAIN CHANNEL
TO MBF
CONTROL INTERFACE
PI-DTL MMIO ADAPTER
YUV
YUV
YUV
YUV
FRONT END PROCESSING
MEMORY BASED PROCESSING
BACK END PROCESSING
7300
7300
7300
COLOUR FEATURES
Y
U
V
COLOUR
SPACE
CONVERSION
FRAME
PROCESSING
R
G
B
TO DOP
FROM MBF
LUMINANCE SHARPNESS
CONTROL INTERFACE
PI-DTL MMIO ADAPTER
SUB
SHAPE
R
G
B
HORIZONTAL
COMPRESSION
CHANNEL
SUB
YUV
VERTICAL
COMPRESSION
NOISE
FEATURE BOX
COMPENSATION
DELAY
DCTI
Y
UV
Y
U
V
PANORAMA
Y
U
V
FILTERS
COMPENSATION
DELAY
SHARPNESS
MEASURE
DYNAMIC
PEAKING
LTI
256
Y
U
V
SKIN
TONE
CONTROL
BLUE
STRETCH
GREEN
ENHANCE
FIFO CACHE
HORIZONTAL
COMPRESSION
CHANNEL
MAIN
YUV
NOISE
SHAPE
MAIN
FIFO CACHE
DNR
MEMORY BUS
DEVICE
INTERFACE
UNDITHER
UNDITHER
UNDITHER
SCAN RATE
CONVERSION
DISPLAY CONTROLLER
MODE CONTROL
OUTPUT
MULTIPLEXER
DTL INTERFACE
SDRAM
VIA
MMI
TO BEF
YUV
CONTROL INTERFACE
MMIO ADAPTER
DTL MMIO
PI-BUS
MEMORY BASED FEATURES
SAMPLE RATE
CONVERTER
SAMPLE RATE
CONVERTER
VIDDEC2
FROM
VIDDEC1
FROM
BLACK
STRETCH
BLACK
STRETCH
HISTOGRAM
MODIFY
HISTOGRAM
MEASURE
BLACKLEVEL
DETECTION
BLACKBAR
DETECTION
NOISE
MEASURE
Y
Y
INPUT
SWITCH
MATRIX
MEASUREMENT BLOCKS
SUB CHANNEL
TO MBF
CL 36532058_027.eps
020903
3139 123 5536.2
Summary of Contents for A02E
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