Circuit Descriptions
EN 49
Q549.2E LA
7.
2009-May-08
Figure 7-10 PNX8543 connectivity and compute subsystem
The Connectivity Subsystem consists of:
•
PCI/XIO interface
•
USB2.0 interface
•
Three 2-wire UARTs
•
Four Master/Slave I
2
C interfaces
•
Common Interface/Conditional Access Interface.
The Computing Subsystem consists of:
•
32-bit MIPS RISC core
•
Enhanced JTAG (EJTAG) block inside the MIPS
•
JTAG_MMIO blocks
•
TV controller
•
Audio/Video DSP (AV_DSP)
•
Memory Control Unit (MCU).
7.5.4
Service Notice - FLASH RAM / PNX8543 exchange
The FLASH RAM (item 7P10) and/or PNX8543 (item 7H00)
can only be exchanged by an authorised central workshop with
dedicated programming tools. Due to the presence of (CI+)
keys in the components,
unauthorised exchange of these
components will always result in a defective board
.
1
8
440_205_090226.ep
s
090226
JTAG_MMIO
UART2
UART1
IIC2_DMA
IIC
3
_DMA
MIP
S
4KEc
S
Y
S
TEM
CONTROLLER
8
0C51
PCI_XIO
CAI
MCU_DDR
DMA B
U
S
DC
S
-NETW
ORK
DDR2-
S
DRAM
I2C-2
I2C-
3
EJTAG
PNX
8
54
3
x
UART-1
UART-2
I2C-MC
UART-
3
PWM
s
GPIO
s
CI/CA
PCI/XIO
EJTAG
U
S
B2.0
U
S
B
AVD
S
P
IIC4_DMA
I2C-1