IC Data Sheets
8.
8.4
EM6AA160TS (IC U5101)
Figure 8-4 Internal block diagram
CK
CKE
C
S
RA
S
CA
S
WE
DLL
CLOCK
BUFFER
COMMAND
DECODER
COLUMN
COUNTER
CONTROL
S
IGNAL
GENERATOR
ADDRE
SS
BUFFER
REFRE
S
H
COUNTER
4M x 16
CELL ARRAY
(BANK #0)
Row
Decoder
4M x 16
CELL ARRAY
(BANK #1)
Row
Decoder
4M x 16
CELL ARRAY
(BANK #2)
Row
Dec
oder
4M x 16
CELL ARRAY
(BANK #
3
)
Row
D
eco
de
r
Col
u
mn Decoder
Col
u
mn Decoder
Col
u
mn Decoder
Col
u
mn Decoder
MODE
REGI
S
TER
A10/AP
A9
A11
A12
BA0
BA1
~
A0
CK
DATA
S
TROBE
BUFFER
LDQ
S
UDQ
S
DQ
B
u
ffer
LDM
UDM
DQ15
DQ0
~
1
8
400_
3
0
3
_090
3
01.ep
s
090619
Block Di
a
gr
a
m