background image

38

240P

W

9

L

C

D

S

c

al

e

r

D

iag

ra

m

C3

5

D

5

C

5

9

C3

R

1

3

7

C4

R

7

1

B

4

C3

6

D

5

C

6

0

C4

R

8

4

B

4

R

8

3

B

4

C5

4

D

5

C

6

1

C4

R

N

1

D

2

R

7

3

B

2

C

3

7

D

4

C

6

2

B3

R

N

2

D

2

R

7

4

B2

C

3

8

D

3C

6

4

B

1

R

N

3

D

2R

7

6

B

2

C3

9

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3

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6

5

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1

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4

D

2

R

7

8

B

2

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4

0

D

3C

6

6

B

1

R

N

5

C

2R

N

1

9

A

2

C

4

1

D

1

C

6

7

B

1

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C

1

R

N

8

C

2

C4

2

D

1

C

6

8

B

1

U

6

C3

R

N

9

C

2

C4

3

D

1

C

6

9

B

1

C4

6

D

1

R

N

1

0

C

2

C4

4

D

1

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7

0

B

1

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7

D

1

R

N

1

1

B

2

C4

5

D

1

C

7

1

B

1

C4

8

D

1

R

N

1

2

B

2

C5

3

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5

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7

2

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1

C4

9

D

1

R

N

1

3

B

2

C6

3

B

2

C

7

3

B

1

C5

0

D

1

R

N

1

8

A

2

C9

4

D

1

C

7

4

B

1

C5

1

D

1

R

7

5

B

5

L

4

D

1

C7

5

B

1

C

5

2

C4

R

7

7

B

5

L

5

D

5

C7

6

B

4

C

5

5

C2

R

8

2

B

4

L

6

D

5

C7

7

B

4

C

5

6

C2

R

N

1

4

B

2

L

7

D

5

C7

8

B

3

C

5

7

C4

R

N

1

5

B

2

L8

D

5

C

7

9

B

3

C

5

8

C

3

R

N

1

6

B

2

R6

7

C

5

C

8

0

B

4

R7

9

B

2

R

N

1

7

A

2

R6

8

C

5

C

8

1

B

3

R8

0

B

2

R6

9

C

5

R

N

7

C

2

R8

1

B

2

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

M_

MA

R9

M

1_M

D

2

5

V3

3

_

C

U

T

M

1_M

D

1

7

MA12

MA11

DRX

C

P

M

1_M

D

5

M

1_M

D

2

9

V3

3

_

C

U

T

M

1_M

D

1

4

MA7

M

1_M

D

6

V

18S

M

1_M

D

1

8

M

1_M

D

9

V

18S

V

18S

M

1_M

D

2

3

DRX

2

N

MA9

DR

X

C

N

M

1_M

D

1

6

M

1_M

D

8

M

1_M

D

1

5

DR

X

1

P

DR

X

2

P

M

1_M

D

2

6

M

1_M

D

2

0

M

1_M

D

2

1

MA6

MA4

M

1_M

D

3

0

DRX

0

N

M

1_M

D

0

M

1_M

D

2

4

M

1_M

D

1

0

M

1_M

D

2

7

MA8

DRX

1

N

M

1_M

D

2

8

M

1_M

D

1

V3

3

_

C

U

T

M

1_M

D

1

9

M

1_M

D

1

3

M

1_M

D

2

MA1

M

1_M

D

1

2

M

1_M

D

4

DR

X

0

P

M

1_M

D

2

2

MA5

MA0

M

1_M

D

7

M

1_M

D

1

1

M

1_M

D

3

1

MA3

M

1_M

D

3

MA10

MA2

TXE2

-

TXEC+

TXE2

+

TXE0

-

TXE0

+

TXE3

+

TXE1

-

TXE3

-

TXE1

+

TXEC-

TXOC+

TXO

0

+

TXOC-

TXO

2

+

TXO

3

+

TXO

2

-

TXO

0

-

TXO

3

-

TXO

1

+

TXO

1

-

M_

MA

R2

M_

MA

R5

M_

MA

R1

M_

MA

R10

M

1_M

D

R

2

0

M

1_M

D

R

6

M_

MA

R6

M_

MA

R0

M_

MA

R12

M

1_M

D

R

4

M_

MA

R8

M

1_M

D

R

3

M_

MA

R7

M

1_M

D

R

5

M

1_M

D

R

1

8

M_

MA

R3

M

1_M

D

R

0

M_

MA

R11

M

1_M

D

R

2

M_

MA

R4

M

1_M

D

R

2

3

M

1_M

D

R

1

9

M

1_M

D

R

1

M

1_M

D

R

1

7

M

1_M

D

R

1

6

M

1_M

D

R

2

2

M

1_M

D

R

2

1

M

1_M

D

R

7

V

18S

MC

_

C

K

E

MC

_

W

E

MC

_

C

S

MC

_

C

A

S

MC

_

R

A

S

MC

_

C

L

K

M

C

_

RCS

MC

_

R

W

E

MC

_

R

C

K

E

MC

_

R

R

A

S

MC

_

R

C

A

S

D

D

C2

_

S

DA

D

D

C2

_

S

CL

RT

D_

S

C

L

K

VS

Y

N

C

GN

D

G

SOG

GI

N

GN

D

B

G

NDR

BI

N

RI

N

HSYNC

M

2_M

D

R

0

M

2_M

D

2

9

M

2_M

D

R

2

2

M

2_M

D

7

M

2_M

D

2

2

M

2_M

D

R

2

6

M

2_M

D

1

0

M

2_M

D

1

6

M

2_M

D

R

1

0

M

2_M

D

R

2

9

M

2_M

D

R

2

5

M

2_M

D

2

0

M

2_M

D

R

1

2

M

2_M

D

R

1

9

M

2_M

D

1

1

M

2_M

D

R

9

M

2_M

D

R

1

6

M

2_M

D

R

1

3

M

2_M

D

2

4

M

2_M

D

R

6

M

2_M

D

2

5

M

2_M

D

R

3

M

2_M

D

2

7

M

2_M

D

1

5

M

2_M

D

R

1

5

M

2_M

D

3

M

2_M

D

R

2

3

M

2_M

D

1

2

M

2_M

D

2

M

2_M

D

R

1

4

M

2_M

D

R

1

8

M

2_M

D

5

M

2_M

D

R

2

0

M

2_M

D

R

2

4

M

2_M

D

8

M

2_M

D

R

3

1

M

2_M

D

1

3

M

2_M

D

9

M

2_M

D

3

0

M

2_M

D

6

M

2_M

D

0

M

2_M

D

R

2

8

M

2_M

D

3

1

M

2_M

D

R

8

M

2_M

D

R

5

M

2_M

D

2

6

M

2_M

D

1

4

M

2_M

D

R

7

M

2_M

D

2

3

M

2_M

D

R

3

0

M

2_M

D

R

1

7

M

2_M

D

R

2

M

2_M

D

1

8

M

2_M

D

1

M

2_M

D

2

1

M

2_M

D

1

7

M

2_M

D

R

2

7

M

2_M

D

1

9

M

2_M

D

R

2

1

M

2_M

D

4

M

2_M

D

R

1

1

M

2_M

D

R

1

M

2_M

D

R

4

M

2_M

D

2

8

V

3

3

_

CUT

MC

_

R

C

L

K

V

1

8S

_C

V

33S

_P

L

L

RT

D_

S

D

IO3

V

18S

_

A

D

C

V

3

3S

_P

A

D

RT

D_

S

C

S

B

TXOC

-

TXO

C+

TXE

0-

TXE0+

TXE

3-

TXE3+

TXO

3-

TXO

2-

TXO1

+

TXO

1-

TXO2

+

TXO3

+

MC_

CL

K

MC_

CA

S

MC_

WE

MC_

CK

E

MC_

RA

S

MC_

CS

TXEC-

TXE

C+

TXE1+

TXE

2-

TXE2+

TXE

1-

MA9

MA0 
MA5

MA1

1

MA7

MA3

MA1

2

MA6

MA1

MA1

0

MA2

MA4

MA8

TXO

0-

TXO0

+

M

2_M

D

1

0

M

2_M

D

9

M

2_M

D

8

M

2_M

D

7

M

2_M

D

6

M

2_M

D

5

M

2_M

D

4

M

2_M

D

3

M

2_M

D

2

M

2_M

D

1

M

2_M

D

0

M

1_M

D

2

5

M

1_M

D

3

0

M

1_M

D

3

1

M

1_M

D

2

7

M

1_M

D

2

6

M

1_M

D

2

8

M

1_M

D

2

9

M

1_M

D

1

8

M

1_M

D

2

2

M

1_M

D

2

0

M

1_M

D

2

1

M

1_M

D

1

9

M

1_M

D

1

7

M

1_M

D

1

6

M

1_M

D

8

M

1_M

D

1

0

M

1_M

D

1

3

M

1_M

D

9

M

1_M

D

1

1

M

1_M

D

1

2

M

1_M

D

1

4

M

1_M

D

5

M

1_M

D

1

M

1_M

D

2

M

1_M

D

4

M

1_M

D

0

M

1_M

D

3

M

1_M

D

6

M

1_M

D

7

M

1_M

D

1

5

M

1_M

D

2

3

M

1_M

D

2

4

D

D

C

2_S

D

A

D

D

C

2_S

C

L

RT

D_

S

C

L

K

RT

D_

S

D

IO3

RT

D_

S

C

S

B

M2_M

D1

2

M2_M

D1

1

RI

N

GND

G

GNDR

GIN

SOG

GND

B

BIN

M2_M

D3

1

M2_M

D3

0

M2_M

D2

9

M2_M

D2

8

M2_M

D2

7

DR

XC

N

DRX1N

DRX0N

DRX2P

DRX1P

DRXCP

DRX0P

DRX2N

M2_M

D2

6

VS

YN

C

HS

YN

C

M2_M

D2

5

M2_M

D2

4

M2_M

D2

3

M2_M

D2

2

M2_M

D2

1

M2_M

D2

0

M2_M

D1

9

M2_M

D1

8

M2_M

D1

7

M2_M

D1

6

M2_M

D1

5

M2_M

D1

4

M2_M

D1

3

M

1_M

D

R

6

M

1_M

D

R

7

M

1_M

D

R

8

M

1_M

D

R

9

M

1_M

D

R

10

M

1_M

D

R

11

M

1_M

D

R

12

M

1_M

D

R

13

M

1_M

D

R

14

M

1_M

D

R

15

M

1_M

D

R

16

M

1_M

D

R

17

M

1_M

D

R

18

M

1_M

D

R

19

M

1_M

D

R

20

M

1_M

D

R

21

M

1_M

D

R

22

M

1_M

D

R

23

M

1_M

D

R

24

M

1_M

D

R

25

M

1_M

D

R

26

MC

_

R

C

L

K

M

1_M

D

R

27

MC

_

R

C

K

E

M

1_M

D

R

28

M

1_M

D

R

29

M

1_M

D

R

30

M

1_M

D

R

31

MC

_

R

W

E

MC

_

R

C

S

MC

_

R

C

A

S

MC

_

R

R

A

S

M_

MA

R12

M_

MA

R11

M_

MA

R0

M_

MA

R1

M_

MA

R2

M_

MA

R3

M_

MA

R4

M_

MA

R5

M_

MA

R6

M_

MA

R7

M_

MA

R8

M_

MA

R9

M_

MA

R10

M

1_M

D

R

0

M

1_M

D

R

1

M

1_M

D

R

2

M

1_M

D

R

3

M

1_M

D

R

4

M

1_M

D

R

5

M

2_M

D

R

6

M

2_M

D

R

7

M

2_M

D

R

8

M

2_M

D

R

9

M

2_M

D

R

10

M

2_M

D

R

11

M

2_M

D

R

12

M

2_M

D

R

13

M

2_M

D

R

14

M

2_M

D

R

15

M

2_M

D

R

16

M

2_M

D

R

17

M

2_M

D

R

18

M

2_M

D

R

19

M

2_M

D

R

20

M

2_M

D

R

21

M

2_M

D

R

22

M

2_M

D

R

23

M

2_M

D

R

24

M

2_M

D

R

25

M

2_M

D

R

26

MC

_

R

C

L

K

M

2_M

D

R

27

MC

_

R

C

K

E

M

2_M

D

R

28

M

2_M

D

R

29

M

2_M

D

R

30

M

2_M

D

R

31

MC

_

R

W

E

MC

_

R

C

S

MC

_

R

C

A

S

MC

_

R

R

A

S

M_

MA

R12

M_

MA

R11

M_

MA

R0

M_

MA

R1

M_

MA

R2

M_

MA

R3

M_

MA

R4

M_

MA

R5

M_

MA

R6

M_

MA

R7

M_

MA

R8

M_

MA

R9

M_

MA

R10

M

2_M

D

R

0

M

2_M

D

R

1

M

2_M

D

R

2

M

2_M

D

R

3

M

2_M

D

R

4

M

2_M

D

R

5

M

1_M

D

R

1

0

M

1_M

D

R

1

5

M

1_M

D

R

9

M

1_M

D

R

1

2

M

1_M

D

R

1

1

M

1_M

D

R

1

4

M

1_M

D

R

8

M

1_M

D

R

1

3

M

1_M

D

R

3

0

M

1_M

D

R

2

5

M

1_M

D

R

2

7

M

1_M

D

R

2

6

M

1_M

D

R

3

1

M

1_M

D

R

2

8

M

1_M

D

R

2

4

M

1_M

D

R

2

9

DR

X

2

P

3

RT

D_

SC

S

B

4

TXO

2

-

6

DRX1

N

3

TXE1

-

6

TXEC-

6

TXE2

+

6

TXE0

+

6

DRX0

N

3

TXO

3

-

6

TXOC-

6

TXO

3

+

6

V

18S

7

TXE3

-

6

TXE1

+

6

TXO

2

+

6

RT

D_

S

C

L

K

4

TXE2

-

6

DR

X

0

P

3

DR

X

C

N

3

DRX2

N

3

TXO

1+

6

TXEC+

6

TXOC+

6

TXE3

+

6

TXO

1

-

6

V

33_C

U

T

4,

7

TXO

0

+

6

DR

X

1

P

3

TXO

0

-

6

TXE0

-

6

RT

D_

SD

IO3

4

DRXC

P

3

DVI

_

SDA

3,

4

DVI

_

SCL

3

V

SYNC

2

HSYNC

2

BI

N

2

GN

D

B

2

SOG

2

GI

N

2

GN

D

G

2

RIN

2

G

NDR

2

RESE

T

_

M

C

U

4

YO

U

T

4

DAC
8

V

18S

_

A

D

C

V

3

3S

_P

A

D

V

33S

_P

L

L

V

3

3S

_P

A

D

V

1

8S

_C

V

3

3

_

CUT

V33_MEM

V

3

3S

_P

A

D

V

3

3S

_P

A

D

V

3

3S

_P

A

D

V

1

8S

_C

V

33S

_P

A

D

V

33S

_P

A

D

V

33S

_P

A

D

V

18S

_C

V

3

3S

_P

A

D

V

3

3S

_P

A

D

V

3

3S

_P

A

D

V

3

3S

_P

A

D

V

1

8S

_C

V

33S

_P

L

L

V

33S

_P

L

L

V

33S

_P

A

D

V

3

3S

_P

A

D

V1

8

S

_

A

D

C

V

1

8S

_C

V

33S

_P

L

L

V33_MEM

V33_MEM

V3

3

_

C

U

T

PIN24

PIN1

,8

Host

Interface(Open

Drain)

Pull

High

Scalar

D

D

C

channel

L

V

DS

output

D

V

I

input

D

-

SUB

input

M

E

MORY

POWER

shield

i

n

g

shield

i

n

g

shield

i

n

g

shiel

ding

shiel

ding

shiel

ding

shiel

ding

shield

i

n

g

shield

i

n

g

PIN2(TMDS

TEST):

Host

Interfa

c

e

Select

"H"--Pa

rallel

"L"--Se

r

i

a

l

shiel

ding

shiel

ding

shiel

ding

shiel

ding

R81

2

2

J

C75

0.1

UZ

C5

4

10

U

Z

C6

2

0

.1

U

Z

R68

4.7KJ

R71

4.7KJ

C38

0.1

UZ

R73

2

2

J

RN

5

22

1

2

3

4

8

7

6

5

C5

3

22

U

Z

C46

0.1

UZ

C5

6

0

.1

U

Z

C68

0.1

UZ

RN

1

5

22

1

2

3

4

8

7

6

5

RN

2

22

1

2

3

4

8

7

6

5

C5

7

0

.1

U

Z

C6

3

O

P

E

N

/0

.1

U

Z

C79

0.1

UZ

C47

0.1

UZ

C37

0.1

UZ

RN

1

0

22

1

2

3

4

8

7

6

5

R84

1K

J

C69

0.1

UZ

C3

6

10

U

Z

C48

0.1

UZ

R76

2

2

J

RN

7

22

1

2

3

4

8

7

6

5

C40

0.1

UZ

R7

5

0J

C70

0.1

UZ

RN

1

7

22

1

2

3

4

8

7

6

5

RN

1

6

22

1

2

3

4

8

7

6

5

C6

0

0

.1

U

Z

R67

4.7KJ

RN

4

22

1

2

3

4

8

7

6

5

L7

Z220

RN

1

22

1

2

3

4

8

7

6

5

C41

0.1

UZ

C49

0.1

UZ

C5

8

0

.1

U

Z

R8

2

O

P

E

N

/4.7K

J

C71

0.1

UZ

R78

2

2

J

R69

4.7KJ

R1

3

7

O

P

E

N

/4.7K

J

C76

0.1

UZ

R7

7

0J

RN

1

9

22

1

2

3

4

8

7

6

5

C80

0.1

UZ

C42

0.1

UZ

C50

0.1

UZ

RN

9

22

1

2

3

4

8

7

6

5

C64

0.1

UZ

C72

0.1

UZ

C5

9

0

.1

U

Z

R79

2

2

J

R8

3

4.7K

J

C39

0.1

UZ

R74

2

2

J

+

C9

4

47U

2

5

V

1

2

L6

Z220

C6

1

0

.1

U

Z

C78

0.1

UZ

U6

RT

D2549T

H-

L

F

PLL_V

DD

1

TMDS_

TST/IRQ#

2

RX2P/RX0

P

3

RX2N/RX0

N

4

TMDS_

REXT

5

RX1P

6

RX1N

7

TM

DS_VDD

8

RX0P/RX2

P

9

RX0N/RX2

N

10

TM

DS_GND

11

RXCP

12

RXCN

13

AVS0

14

AHS0

15

ADC_GND

16

B-

17

B+

18

G-

19

G+

20

SOG

21

R-

22

R+

23

ADC_VDD

24

DDCSCL1

25

DDCSDA1

26

MD

[63]

27

MD

[44

]/V0/

TCON[1

0][9

]

51

MD

[43

]/VCLK/

TCON[1

3][1

2]

52

MD

[62]

28

MD

[61]

29

MD

[60]

30

MD

[59

]/V15

31

MD

[58

]/V14

32

MD

[45

]/V1/

TCON[7

][8]

50

MD

[46

]/V2/

TCON[4

][5]

49

MD

[47

]/V3/

TCON[0

][1]

48

MD

[48

]/V4

45

MD

[49

]/V5/

PW

M2

44

MD

[50

]/V6/

PW

M1

43

MD

[51

]/V7/

PW

M0

42

MD

[52

]/V8

41

MD

[53

]/V9

40

MD

[54

]/V10

39

MD

[55

]/V11

38

MD

[56

]/V12

34

MD

[57

]/V13

33

VCCK

35

PGND

36

PVCC

37

PVCC

46

PGND

47

MD[42]/MCK/

TCON2/

PWM0

53

MD[41]/SCK/

TCON3/

PWM1

54

MD[40]/WS/

TCON11/

PWM2

55

MD[39]/SD0/

TCON[6][7]/

SPDIF3

56

MD[38]/SD1/

TCON[0][9]/

SPDIF2

57

MD[37]/SD2/

TCON[1][8]/

SPDIF1

58

MD[36]/SD3/

TCON[2][12]/

SPDIF0

59

PVCC

60

PGND

61

MD[35]/SPDIF0

62

MD[34]/SPDIF1/

PWM2

63

MD[33]/SPDIF2/

PWM1

64

MD[32]/SPDIF3/

PWM0

65

NC

66

NC

67

MD[31]

68

MD[30]

69

MD[29]

70

MD[28]

71

MD[27]

72

MD[26]

73

MD[25]

74

MD[24]

75

VCCK

76

PGND

77

PVCC

78

MD[23]

79

MD[22]

80

MD[21]

81

MD[20]

82

MD[19]

83

MD[18]

84

MD[17]

85

MD[16]

86

MD[15]/

TCON5

87

MD[14]/

TCON0/

PWM2

88

MD[13]/

TCON7

89

MD[12]/

TCON13

90

MD[11]/

VO_ODD

91

MD[10]/

VO_DVS

92

MD[9]/

VO_DHS

93

MD[8]/

VO_DENA

94

PVCC

96

PGND

95

MD[7]/

VO_CLK

97

MD[6]/

VO23

98

MD[5]/

TCON10

99

MD[4]/

DVS

100

MD[3]/

VO22

101

MD[2]/

VO21

102

MD[1]/

VO20

103

MD[0]/

VO19

104

MC

_W

E/VO

18

105

MC

_C

AS/VO

17

106

MC

_CLK

/V

O1

6

107

MC

_R

AS/VO

15

108

MC

_C

KE/VO

14

109

MC

_C

S/VO

13

110

PVCC

111

PGND

112

MA

[9][X]/

VO1

2

113

MA

[11

][11

]/

VO

11

114

MA

[8][9

]/VO

10

115

MA

[12

][10

]/

VO

9

116

MA

[7][8

]/VO

8

117

MA

[10

][0]/

VO7

118

MA

[6][7

]/VO

6

119

MA

[0][1

]/VO

5

120

MA

[5][6

]/VO

4

121

MA

[1][2

]/VO

3

122

MA

[4][5

]/VO

2

123

MA

[2][3

]/VO

1

124

MA

[3][4

]/VO

0

125

VCCK

126

PGND

127

PVCC

128

BB3P/

BBLU7

129

BB3N/

BBLU6

130

BB2P/

BBLU5

131

BB2N/

BBLU4

132

BB1P/

BBLU3

133

BB1N/

BBLU2

134

TXO3

+/

BB0P/

BBLU1

135

TXO3

-/

BB0N/

BBLU0

136

TXOC+/

BCLKP/

BGRN7

137

TX

OC-/

BCLKN/

BGRN6

138

TXO2

+/

BG

3P/

BGRN5

139

TXO2-/

BG3N

/BGRN4

140

TXO1

+/

BG

2P/

BGRN3

141

TXO1-/

BG2N

/BGRN2

142

TXO0

+/

BG

1P/

BGRN1

143

TXO0-/

BG1N

/BGRN0

144

PVCC

145

PGND

146

TXE3+

/BG

0P

/BRED7

147

TXE3-/

BG0

N/

BRED6

148

TXEC+/

BR3P/

BRED5

149

TXEC-/BR3

N/BRED4

150

TXE2+

/BR2

P/BRED3

151

TXE2-/

BR2N/

BRED2

152

TXE1+

/BR1

P/BRED1

153

TXE1-/

BR1N/

BRED0

154

TXE0+/

BR0P/

ABLU7

155

TXE0-/

BR0N/

ABLU6

156

PVCC

157

PGND

158

AB3P/

ABLU5

159

AB3N/

ABLU4

160

AB2P/

ABLU3

161

AB2N/

ABLU2

162

AB1P/

ABLU1

163

AB1N/

ABLU0

164

AB0P/

AGRN7

165

AB0N/

AGRN6

166

ACLKP/

AGRN5

167

ACLKN/

AGRN4

168

AG3P/

AGRN3

169

AG3N/

AGRN2

170

AG2P/

AGRN1

171

AG2N/

AGRN0

172

AG1P/

ARED7

173

AG1N/

ARED6

174

AG0P/

ARED5

175

AG0N/

ARED4

176

PVCC

177

PGND

178

AR3P/

ARED3

179

AR3N/

ARED2

180

AR2P/

ARED1

181

AR2N/

ARED0

182

AR1P

183

AR1N

184

AR0P

185

AR0N

186

TCON[0][1]/

ECLK

187

TCON[1][2]/

DENA

188

TCON[3][4]/

DHS

189

TCON[5][6]/

DVS

190

PVCC

191

PGND

192

VCCK

193

TCON[7][8]/

OCLK

194

TCON[8][9]/

PWM2

195

TCON[10][11]/

PWM1

196

TCON[12][13]/

PWM0

197

SDIO[0]/

PWM2/

TCON12

198

SDIO[1]/

PWM1/

TCON10

199

SDIO[2]/

PWM0/

TCON8

200

SDIO[3]

201

SCLK

202

SCSB

203

DDCSDA2/

PWM1/

TCON6

204

DDCSCL2/

PWM0/

TCON4

205

RESET

206

XO

207

XI

208

C43

0.1

UZ

C51

0.1

UZ

RN

6

22

1

2

3

4

8

7

6

5

U5

E

M

6

3

8325TS-6G

DQ0

2

DQ1

4

DQ2

5

DQ3

7

DQ4

8

DQ5

10

DQ6

11

DQ7

13

DQ8

74

DQ9

76

DQ10

77

DQ11

79

DQ12

80

DQ13

82

DQ14

83

DQ15

85

DQ16

31

DQ17

33

DQ18

34

DQ19

36

DQ20

37

DQ21

39

DQ22

40

DQ23

42

DQ24

45

DQ25

47

DQ26

48

DQ27

50

DQ28

51

DQ29

53

DQ30

54

DQ31

56

VDD1

1

VDD2

15

VDD3

29

VDD4

43

VDDQ1

3

VDDQ2

9

VDDQ3

35

VDDQ4

41

VDDQ5

49

VDDQ6

55

VDDQ7

75

VDDQ8

81

VSS1

44

VSS2

58

VSS3

72

VSS4

86

VSSQ1

6

VSSQ2

12

VSSQ3

32

VSSQ4

38

VSSQ5

46

VSSQ6

52

VSSQ7

78

VSSQ8

84

A0

25

A1

26

A2

27

A3

60

A4

61

A5

62

A6

63

A7

64

A8

65

A9

66

A10/AP

24

CLK

68

CKE

67

WE

17

CAS

18

RAS

19

CS

20

BA0

22

BA1

23

DQM0

16

DQM1

71

DQM3

59

DQM2

28

NC1

14

NC2

21

NC3

30

NC4

57

NC5

69

NC6

70

NC7

73

C65

0.1

UZ

C73

0.1

UZ

L4

Z220

RN

1

4

22

1

2

3

4

8

7

6

5

C3

5

10

U

Z

RN

3

22

1

2

3

4

8

7

6

5

C44

0.1

UZ

RN

1

2

22

1

2

3

4

8

7

6

5

C66

0.1

UZ

C52

0.1

UZ

C5

5

0

.1

U

Z

R80

2

2

J

C77

0.1

UZ

RN

1

1

22

1

2

3

4

8

7

6

5

U7

E

M

6

3

8325TS-6G

DQ0

2

DQ1

4

DQ2

5

DQ3

7

DQ4

8

DQ5

10

DQ6

11

DQ7

13

DQ8

74

DQ9

76

DQ10

77

DQ11

79

DQ12

80

DQ13

82

DQ14

83

DQ15

85

DQ16

31

DQ17

33

DQ18

34

DQ19

36

DQ20

37

DQ21

39

DQ22

40

DQ23

42

DQ24

45

DQ25

47

DQ26

48

DQ27

50

DQ28

51

DQ29

53

DQ30

54

DQ31

56

VDD1

1

VDD2

15

VDD3

29

VDD4

43

VDDQ1

3

VDDQ2

9

VDDQ3

35

VDDQ4

41

VDDQ5

49

VDDQ6

55

VDDQ7

75

VDDQ8

81

VSS1

44

VSS2

58

VSS3

72

VSS4

86

VSSQ1

6

VSSQ2

12

VSSQ3

32

VSSQ4

38

VSSQ5

46

VSSQ6

52

VSSQ7

78

VSSQ8

84

A0

25

A1

26

A2

27

A3

60

A4

61

A5

62

A6

63

A7

64

A8

65

A9

66

A10/AP

24

CLK

68

CKE

67

WE

17

CAS

18

RAS

19

CS

20

BA0

22

BA1

23

DQM0

16

DQM1

71

DQM3

59

DQM2

28

NC1

14

NC2

21

NC3

30

NC4

57

NC5

69

NC6

70

NC7

73

C74

0.1

UZ

C81

0.1

UZ

L8

Z220

RN

1

8

22

1

2

3

4

8

7

6

5

C45

0.1

UZ

RN

1

3

22

1

2

3

4

8

7

6

5

C67

0.1

UZ

RN

8

22

1

2

3

4

8

7

6

5

L5

Z220

Summary of Contents for 240PW9EB/69

Page 1: ... Repair tips 85 86 Repair Flow chart 87 89 Safety Test Requirments 90 Spare arts List 83 Recommended P Failure Mode Of Panel SAFETY NOTICE Chassis HUDSON 9 24 inch TFT WXGA LCD Colour Monitor REFER TO BACK COVER FOR IMPORTANT SAFETY GUIDELINES ANY PERSON ATTEMPTING TO SERVICE THIS CHASSIS MUST FAMILIARIZE HIMSELF WITH THE CHASSIS AND BE AWARE OF THE NECESSARY SAFETY PRECAUTIONS TO BE USED WHEN SER...

Page 2: ...g with the safety symbol on the schematics or exploded views Use of substitute replacement parts which do not have the same specified safety characteristics may create shock fire or other hazards Under no circumstances should the original design be modified or altered without written permission from Philips Philips assumes no liability express or implied arising out of any unauthorized modificatio...

Page 3: ...ply with the Microsoft On Now specification and meet EPA requirements Mode HSYNC VSYNC Video Pwr cons Indication Rec time Power On On On active 90W typical After 30 mins Blue LED Off Off Off blanked 1 W 110V 2 W 220V Blue LED Blinking 3 sec on 3sec off 3 s DC Power Off N A 1 W LED Off PIN No SIGNAL 1 Red 2 Green SOG 3 Blue 4 Sense GND 5 Cable Detect GND 6 Red GND 7 Green GND 8 Blue GND 9 DDC 3 3V ...

Page 4: ...nput 5 Kensington anti thief lock Accessory Packʳ ʳ ʳ ʳ Unpack all the parts ʳ Power cord DVI cable Optional VGA cable EDFU pack Connecting to Your PC ʳ ʳ ʳ ʳ 1 Connect the power cord to the back of the monitor firmly Philips has pre connected VGA cable for the first installation 2 Connect to PCʳ a Turn off your computer and unplug its power cable b Connect the monitor signal cable to the video co...

Page 5: ... Controls Image vibrates on the screen Check that the signal cable is properly connected to the graphics board or PC Vertical flicker appears 1 Press the Auto button 2 Eliminate the vertical bars using the More Settings of Phase Clock in OSD Main Controls Horizontal flicker appears 1 Press the Auto button 2 Eliminate the vertical bars using the More Settings of Phase Clock in OSD Main Controls The...

Page 6: ... user to adjust screen performance or select functions of the monitors directly through an on screen instruction window A user friendly on screen display interface is shown as below ʳ Basic and simple instruction on the control keys ʳ ʳ ʳ ʳ In the OSD shown above users can press buttons at the front bezel of the monitor to move the cursor to confirm the choice or change ʳ ʳ ʳ ...

Page 7: ... different adjustments later on ʳ Resolution notificationʳ ʳ ʳ ʳ This monitor is designed for optimal performance at its native resolution 1920X1200 60Hz When the monitor is powered on at a different resolution an alert is displayed on screen Use 1920X1200 60Hz for best results ʳ Display of the native resolution alert can be switched off from Setup in the OSD On Screen Display menu ʳ ...

Page 8: ......

Page 9: ...gory ʳ Bright Dot Defects Bright dot defects appear as pixels or sub pixels that are always lit or on That is a bright dot is a sub pixel that stands out on the screen when the monitor displays a dark pattern There are the types of bright dot defects ʳ One lit red green or blue sub pixel Two adjacent lit sub pixels Red Blue Purple Red Green Yellow Green Blue Cyan Light Blue Three adjacent lit sub ...

Page 10: ...from the monitor Take off all aluminum foils then draw two pieces of FFC cables disassemble a screw on the USB board Take the entire internal mechanism from Bezel and put it on the cushion Disassemble the Main BKT hexagonal screw 4 Tear off the adhesive tape and pull out the cable which connect panel and power board Disassembled the Main BKT Side screw 2 Disassemble the main mechanism screw 2 Tear...

Page 11: ...AC SOCKET Disassemble the interface board 3 screws Take the PCBA from Main BKT and then put it on the cushion Pull out the cable of Power board Pull out the LVDS cable Disassemble the C B screw 3 Uplift the LED B and separate the boards and bezel Disassembled the other Main BKT Side screw 2 Then pull out the cable ...

Page 12: ...ll comes out Windows screen then release all buttons HUDSON 240BW8 V0 13 2007 08 10 Factory Mode indicator 5 1 White color adjustment Ther e are t hree f actory pres et white color 9300K 6500K s R GB Apply full white pattern with brightness in 100 pos ition and the c ontras t control at 50 pos ition The 1931 C IE C hromaticity c olor triangle diagr am x y c oordinate for the s creen c enter s houl...

Page 13: ...such as ethyl alcohol ethanol acetone hexane etc Q Can I change the color setting of my monitor A Yes you can change your color setting through OSD control as the following procedures 1 Press MENU to show the OSD On Screen Display menu 2 Press Down Arrow to select the option Color then press OK to enter color setting there are three settings as below a Color Temperature The six settings are 5000K ...

Page 14: ... standards for XGA displays Since the vertical horizontal frequency for this dot clock is 60Hz 48kHz the optimum frequency for this monitor is 60Hz Q What kind of wide angle technology is available How does it work A The TFT LCD panel is an element that controls displays the inlet of a backlight using the dual refraction of a liquid crystal Using the property that the projection of inlet light ref...

Page 15: ...D D GND via USB B receptacle Output signal Downstream output VBUS D D GND through USB A receptacle 1 2 Interface 1 2 1 D Sub Cable Length 1 8 M 50 mm Connector type D Sub male with DDC2B pin assignments Blue connector thumb operated jack screws 1 2 2 DVI Cable The input signals are applied to the display through DVI D cable Length 1 8 M 50 mm Connector type DVI D male with DDC 2B pin assignments W...

Page 16: ... y 0 357 0 006 y 0 357 0 02 6500K x 0 313 0 006 6500K x 0 313 0 02 y 0 329 0 006 y 0 329 0 02 7500K x 0 298 0 006 7500K x 0 298 0 02 y 0 314 0 006 y 0 314 0 02 8200K x 0 291 0 006 8200K x 0 291 0 02 y 0 306 0 006 y 0 306 0 02 9300K x 0 283 0 006 9300K x 0 283 0 02 y 0 297 0 006 y 0 297 0 02 11500K x 0 270 0 006 11500K x 0 270 0 02 y 0 281 0 006 y 0 281 0 02 Quality inspect 5000K x 0 345 0 015 y 0 ...

Page 17: ...rds Association VESA Extended Display Identification Data EDID information may be also obtained from VESA Configuration and procedure PI EDID The software is provided by IMS to upgrade the firmware of CPU PI EDID Tools is for the interface between Parallel Port of PC and 15 pin D SUB connector of Monitor It is a windows based program which cannot be run in MS DOS System and equipment requirements ...

Page 18: ... 3V or 5V 10 Logic GND 11 Sense GND 12 Bi directional data 13 H H V sync 14 V sync 15 Data clock B Input DVI D connector pin Pin No Description 1 T M D S data2 2 T M D S data2 3 T M D S data2 shield 4 No Connect 5 No Connect 6 DDC clock 7 DDC data 8 No Connect 9 T M D S data1 10 T M D S data1 11 T M D S data1 shield 12 No Connect 13 No Connect 14 5V Power 15 Ground for 5V Cable detect 16 Hot plug ...

Page 19: ...lips IMS EDID Tools program Step 1 Make a folder in your PC as shown in Fig 3 For example C EDID Step 2 Copy PI EDID Software into your folder as shown in Fig 3 Fig 3 Step 3 Copy the LCD_Analog ddc and LCD_DVI ddc to C EDID as shown in Fig 4 Fig 4 ...

Page 20: ...ess File OPEN EDID to Load DDC file as shown in Fig 6 Load Analog EDID file LCD_Analog ddc to PI EDID exe Fig 6 Update the DDC 1 Connect DSUB Cable to I2C Board Double click the PI EDID exe icon in desktop then appears window as shown in Fig 5 ...

Page 21: ...21 240PW9 LCD DDC Instructions 3 Load EDID file OK as shown in Fig 7 Fig 7 4 Modify Serial Number then Pre ss Update S NŽbutton asshown in Fig 8 Fig 8 ...

Page 22: ...to EEPROM as shown in Fig 9 Fig 9 6 Connect DVI Cable to I2C Board Repeat Step 1 5 to write DVI EDID file 7 Enter Factory Mode then Press the Serial Number Write EDIDS N to EEPROM as shown in Fig 10 Note If not enter Factory Mode this Wrote EDID S N will not work Fig 10 ...

Page 23: ...Serial Number Definition 8 Press Monitor Menu Key to check OSD Serial number is the same as PI EDID write data as shown in Fig 10 Note If not the same please rewrite EDID S N again Fig 14 9 Turn off the monitor exit the factory mode ...

Page 24: ... x 0 6572265625 Red y 0 328125 Green x 0 212890625 Green y 0 6728515625 Blue x 0 142578125 Blue y 0 0712890625 White x 0 3134765625 White y 0 3291015625 Established Timing Established Timinigs I Bit 7 1 720 x 400 70 Hz Supported IBM VGA Bit 6 0 Bit 5 1 640 x 480 60 Hz Supported IBM VGA Bit 4 1 640 x 480 67 Hz Supported Apple MacII Bit 3 1 640 x 480 72 Hz Supported VESA Bit 2 1 640 x 480 75 Hz Supp...

Page 25: ... Bit 7 0 No Interlaced 2 Bit 6 5 0 0 Normal display no stereo 3 Bit 3 4 1 1 Digital Separate 4 Bit 2 1 0 1 Vsync Negative Polarity Hsync Positive Polarity Monitor Serial Number CS10715000001 Monitor Name Philips 240PW Monitor Decription Min V Rate Hz 48 Max V Rate Hz 85 Min H Rate kHz 24 Max H Rate kHz 94 Max Pixel Clock Mhz 210 EDID Data 128 bytes 0 00 1 FF 2 FF 3 FF 4 FF 5 FF 6 FF 7 00 8 41 9 0C...

Page 26: ...reen y 0 6728515625 Blue x 0 142578125 Blue y 0 0712890625 White x 0 3134765625 White y 0 3291015625 Established Timing Established Timinigs I Bit 7 1 720 x 400 70 Hz Supported IBM VGA Bit 6 0 Bit 5 1 640 x 480 60 Hz Supported IBM VGA Bit 4 1 640 x 480 67 Hz Supported Apple MacII Bit 3 1 640 x 480 72 Hz Supported VESA Bit 2 1 640 x 480 75 Hz Supported VESA Bit 1 1 800 x 600 56 Hz Supported VESA Bi...

Page 27: ... Bit 7 0 No Interlaced 2 Bit 6 5 0 0 Normal display no stereo 3 Bit 3 4 1 1 Digital Separate 4 Bit 2 1 0 1 Vsync Negative Polarity Hsync Positive Polarity Monitor Serial Number CS10715000001 Monitor Name Philips 240PW Monitor Decription Min V Rate Hz 48 Max V Rate Hz 85 Min H Rate kHz 24 Max H Rate kHz 94 Max Pixel Clock Mhz 170 EDID Data 128 bytes 0 00 1 FF 2 FF 3 FF 4 FF 5 FF 6 FF 7 00 8 41 9 0C...

Page 28: ...tep 7 S elect H00 file Step 8 Pres s this button to D L S elect Main1 bottom to select file Follow these selections S elect H00 file If it show NG Please re plug power cord and re D L again 240BW 9 240PW 9 select 0x90 240S W 9 select 0x94 It will show PAS S when D L OK Press this button to D L Connected to print cord and PC Connected to Display Signal Cable 1 2 3 3 2 1 1 Select IIC 2 Select RTD212...

Page 29: ...er has bubbles Foreign material inside polarizer It shows liner or dot shape Concentric circle formed Bottom back light of LCD is brighter than normal Back light un uniformity Backlight has foreign material Black or white color liner or circular type Quick reference for failure mode of LCD panel this page presents problems that could be made by LCD panel It is not necessary to repair circuit board...

Page 30: ...Interface board LED board Control board Power board Panel USB board CN702 CN701 J4 J7 J5 J3 J1 J1 30 240PW9 LCD Wiring Diagram ...

Page 31: ...240PW9 LCD 31 Block Diagram ...

Page 32: ..._ON 4 V33S 2 3 5 7 8 V_PANEL V_PANEL R90 OPEN 0 J TP31 R92 OPEN 0 J TP39 R87 OPEN 0 J TP32 TP22 TP40 C85 4 7U K TP42 TP33 J3 2KK2085030 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 G1 G1 G2 G2 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 30 30 TP23 TP41 Q4 2N3904S B E C R86 100K J TP43 TP24 R89 OPEN 2 2M J TP26 TP34 C84 0 1U Z TP27 ...

Page 33: ... ང ګ sheilding Layout ᔾ२MCU sheilding sheilding sheilding sheilding sheilding Host interface D SUB DDC DVI DDC System I2C Rest MCU from Scaler Pivot Func ࣹრ tion for P model R59 4 7K J R88 4 7K J C28 1U OPEN S R46 4 7K 470 P 0 S R62 4 7K J R219 10K J R52 120 J R50 100 J U4 AT24C16AN 10SJ 1 8 A0 1 A1 2 A2 3 GND 4 VCC 8 WP 7 SCL 6 SDA 5 R36 OPEN 2K J R41 4 7K J R221 10K J R55 100 J R53 4 7K J C29 1U...

Page 34: ...V_PANEL V33S GND V18S V33S V33S V33_CUT Screw Holes Scaler Core Optical Points L15 Z600 C93 0 1U Z L17 Z600 L13 Z600 R134 100K J C98 0 1U Z C86 0 1U Z C88 0 1U Z TP51 C110 0 1U Z R135 10K J TP63 U9 G1117 18T43UF GND 1 VOUT 2 VIN 3 C97 0 1U Z C90 22U 25V 1 2 C89 0 1U Z TP65 C113 22U 25V 1 2 H2 HOLE V8 1 2 3 4 5 6 7 8 9 TP67 C108 0 1U Z C91 22U 25V 1 2 C87 0 1U Z U10 AO3401L D G S C92 0 1U Z C109 0 ...

Page 35: ... 6 7 V_PANEL 12V V_PANEL V_PANEL V33S ش 12V ش 12V 2V ؚ ٙ 2V ؚ ٙ 2V ؚ ٙ 2V ؚ ٙ ش 12V 2V ؚ ٙ R125 0 J C101 470P J R97 2K J D9 PZU6 2B2 A K R126 0 J Q8 2N3904S B E C R127 0 J D10 PZU6 2B2 A K C102 470P J R98 2K J J6 2K62095105 1 2 3 4 5 R111 4 7K J C111 0 1U Z R104 OPEN 100 J R119 OPEN 390 D8 PZU6 2B2 A K TP52 TP49 Q7 2N3906S C E B TP48 C103 470P J R115 OPEN 2K J Q9 2N3904S B E C D13 PZU6 2B2 A K R10...

Page 36: ... 6 7 8 DVI_SCL 4 5 DVI_SDA 4 5 Cable_Detect_DVI 4 DVI_5V V33S DVI_5V DVI_EDID_VCC C25 0 1U Z DN13 BAV70LT1G A1 A2 J C116 47P J J2 2K22030024 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 G1 G1 G2 G2 G5 G5 G6 G6 ZD7 BZV55C6V2 A K C117 47P J C19 0 1U Z TP12 TP15 C21 0 1U Z TP13 R31 130 J R27 1K J R306 10K J C23 0 1U Z C1...

Page 37: ..._VGA 4 VGA_SDA 4 VGA_SCL 4 V33S DSUB_EDID_VCC DSUB_EDID_VCC VGA_5V ᔾ२Connector LPF ᔾ२Scalar Reserve For YPbPr Shielding DN4 BAV70LT1G A1 A2 J R6 OPEN 1M J C2 OPEN 4 7P C C6 0 033U K C5 0 047U 16V R24 OPEN 10K J TP1 R20 100 J C13 0 1U Z TP3 Q1 2N3904S B E C R5 56 J ZD4 PZU6 2B2 A K R10 56 J D1 BZV55C6V2 A K TP5 D14 OPEN 1N4148WS A K C114 47P J L2 Z10 C8 0 033U K ZD1 PZU6 2B2 A K C16 22P J R14 2K J ...

Page 38: ...4 8 7 6 5 C53 22U Z C46 0 1U Z C56 0 1U Z C68 0 1U Z RN15 22 1 2 3 4 8 7 6 5 RN2 22 1 2 3 4 8 7 6 5 C57 0 1U Z C63 OPEN 0 1U Z C79 0 1U Z C47 0 1U Z C37 0 1U Z RN10 22 1 2 3 4 8 7 6 5 R84 1K J C69 0 1U Z C36 10U Z C48 0 1U Z R76 22 J RN7 22 1 2 3 4 8 7 6 5 C40 0 1U Z R75 0 J C70 0 1U Z RN17 22 1 2 3 4 8 7 6 5 RN16 22 1 2 3 4 8 7 6 5 C60 0 1U Z R67 4 7K J RN4 22 1 2 3 4 8 7 6 5 L7 Z220 RN1 22 1 2 3...

Page 39: ...240PW9 LCD 39 Scaler Diagram ...

Page 40: ...40 240PW9 LCD Scaler Diagram ...

Page 41: ...240PW9 LCD 41 Power Diagram ...

Page 42: ...42 240PW9 LCD Power Diagram ...

Page 43: ...240PW9 LCD 43 Power Diagram ...

Page 44: ...44 240PW9 LCD Power Diagram ...

Page 45: ...240PW9 LCD 45 Power Diagram ...

Page 46: ...46 240PW9 LCD Power Diagram ...

Page 47: ...Screw Holes C5 0 1U Z R1 10K J H3 HOLE V8 1 2 3 4 5 6 7 8 9 H1 HOLE V8 1 2 3 4 5 6 7 8 9 TP3 OP7 R5 1K J R6 10K J J1 2KK2088005 1 1 2 2 3 3 4 4 5 5 G1 G1 G2 G2 OP1 SW4 6B40100021 1 1 2 2 3 3 4 4 TP4 OP2 C4 0 1U Z LED1 BLUE A K OP3 SW1 6B40100021 1 1 2 2 3 3 4 4 H2 HOLE V8 1 2 3 4 5 6 7 8 9 SW5 6B40100021 1 1 2 2 3 3 4 4 C3 0 1U Z TP1 SW6 6B40100021 1 1 2 2 3 3 4 4 R2 1K J C2 0 1U Z SW2 6B40100021 ...

Page 48: ...48 240PW9 LCD Control Diagram ...

Page 49: ...240PW 9 L CD 49 L E D Diagram U1 C 3 5 5 4 4 3 3 2 2 1 1 D D C C B B A A evCo OP4 OP5 OP6 TP3 OP7 U1 BLUE A K U2 BLUE A K OP1 J1 2K62095104 1 1 2 2 3 3 4 4 OP2 TP2 OP3 TP1 ...

Page 50: ...50 240PW9 LCD LED Diagram ...

Page 51: ...ram C B A J 2 A1 J 1 A2 1 1 2 2 3 3 4 4 5 5 A A B B C C D D DATA V CC V CC G ND G ND DATA DATA DATA VCC v J1 2B10218201 1 1 2 2 3 3 4 4 G1 G1 G2 G2 G3 G3 G4 G4 G5 G5 C8 0 1U K J2 2BC0040011 VCC 1 DATA 2 DATA 3 GND 4 G2 G2 G1 G1 ...

Page 52: ...3 1 1 2 2 3 3 4 4 5 5 A A B B C C D D ROUT LOUT ROUT LOUT AUDIO_GND Ping Assignment 8 LOUT 7 LOUT 6 ROUT 5 ROUT 4 GND 3 HP_L 2 HP_SE 1 HP_R TP6 CN1 2K61185108 1 2 3 4 5 6 7 8 TP4 CN2 2K62244104 1 1 2 2 3 3 4 4 TP2 TP7 TP8 TP3 TP5 TP1 M1 2B10254121 3 5 4 2 1 ...

Page 53: ...240PW9 LCD 53 USB Diagram ...

Page 54: ...9 240ˣ ˣ ˣ ˣW9 GENERAL PRODUCT SPECIFICATION Issued by Mark Chan Argent Chan Revision History ʳ Ver Date yy mm dd Author Brief Description 0 1 2008 05 08 Mark Chan Initial version 0 2 2008 06 11 Mark Chan Updated 0 3 2008 Jul 18 Argent Updated ME request ...

Page 55: ...ʳˢ ʳ ˣ ˬʳ ˢ ʳˠˢ ʳ ˡ ˢˡʳ ˠ ˡ ʳ MAX RESOLUTION 1920 x 1200 NON INTERLACED AT 60 HZ 24 W 1920x1200 16 10 COLOR TFT LCD FLAT PANEL FULL RANGE POWER SUPPLY 90 264 VAC 50 60Hz CE ENVIRONMENTAL POLICY ANTI GLARE TO REDUCE LIGHT REFLECTION POWER MANAGEMENT CAPABILITY SOG SUPPORT TCO 03 for WW models non TCO for China model Waitting for supplier input Xjoepxt Wjtub Qsfnjvn Mphp Dfsujgjdbujpo HDCP support f...

Page 56: ...CANNING 64 3 6 POWER INPUT CONNECTION 65 3 7 POWER MANAGEMENT 65 3 8 ANALOG DISPLAY IDENTIFICATION 65 3 9 DVI D DISPLAY IDENTIFICATION 65 3 10 USB PLUG SUPPORT 65 3 11 DDC CI SUPPORT 65 3 12 EDID 66 3 13 HOT KEY DEFINITION 66 3 14 SMART BRIGHT DYNAMIC BRIGHTNESS CONTROL DBC NOT REQUIRED FOR 240BW8 66 3 15 SMART CONTRAST DYNAMIC CONTRAST RATIO 66 3 16 SMART IMAGE NOT REQUIRED FOR 240BW8 66 3 17 SMA...

Page 57: ...S 73 5 9 IF PAINT IS USED 73 5 10 PLASTIC MOLD TOOLING 73 5 11 PLASTICS FLAMMABILITY 73 5 12 TEXTURE GLOSSING OF HOUSING 74 5 13 TILT AND SWIVEL BASE 74 5 14 KENSINGTON LOCK 74 5 15 LABEL 74 5 16 PRODUCT DIMENSION WEIGHT REFER TO PHILIPS APPROVED SHT 191 SHT560 74 5 17 TRANSPORTATION 75 5 18 PALLET CONTAINER LOADING REFER TO PHILIPS APPROVED SHT 560 75 6 ENVIRONMENTAL CHARACTERISTICS 76 6 1 SUSCEP...

Page 58: ...ˈˋʳʳʳ ˇ ˣ ˌʳʳ ʳ General Product Specification 8 QUALITY ASSURANCE REQUIREMENTS 77 8 1 ACCEPTANCE TEST 77 9 PHILIPS FLAT PANEL MONITORS PIXEL DEFECT POLICY 78 ʳ ʳ ʳ ʳʳ ʳ ʳ ʳ ...

Page 59: ...ent base ˁ ˁ ˁ ˁ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ Type IPS Suppliers to offer the panel specification Panel incoming specification Follow Philips specification LPL Type NR LPL LM240WU4 SLA1 Resolution 1920x1200 WUXGA Outside dimensions 546 4 H x 352 V x 40 3 D Pitch mm 0 27 Color pixel arrangement RGB vertical stripes Display surface Hard coating 3H anti glare treatment of the front polarizer Color depth 16 7 M co...

Page 60: ...ˇ ˣ ˌʳʳ ʳ General Product Specification Functions 1 D SUB analog R G B separate inputs H V sync separated Composite H V TTL level SOG sync 2 DVI digital Panel Link TMDS inputs 2 3 Ambient temperature 0 C 40 C ...

Page 61: ... Negative Video 0 7 Vp p Positive 2 DVI D Digital Input signal Single TMDS link Three channels RX0 RX1 RX2 3 Audio Input signal 1000 mVrms Loudspeaker Impedance 16 Ohm 15 2W 2W stereo for RMS Power Frequency range 450Hz 20KHz Headphone connection will mute speakers 4 USB PLUG 2 0 Not required in 240BW Input signal Upstream input VBUS D D GND via USB B receptacle Output signal Downstream output VBU...

Page 62: ...M D S data2 2 T M D S data2 3 T M D S data2 shield 4 No Connect 5 No Connect 6 DDC clock 7 DDC data No Connect 9 T M D S data1 10 T M D S data1 11 T M D S data1 shield 12 No Connect 13 No Connect 14 5V Power 15 Ground for 5V Cable detect 16 Hot plug detect 17 T M D S data0 1 T M D S data0 PIN No SIGNAL 1 Red 2 Green SOG 3 Blue 4 Sense GND 5 Cable Detect GND 6 Red GND 7 Green GND Blue GND 9 DDC 3 3...

Page 63: ...ˣ ʳ ʳ ʳˍ ˣ ʳ ʳ ʳˍ ˣ ʳ ʳ ʳˍʳ ʳ ʳ ʳ ˁ ˡ ʳ ʳ ʳ ʳ ˁʳ ˁ ˣ ʳ ˢ ʳ ʳ ʳ ˁʳ ʳʳʳʳʳʳʳ ʳ ʳʳ ʳ ʳʳ ʳ ʳʳ ʳ ʳ ʳ ʳ ʳ ˁ ʳ ʳ ʳ ʳ ʳ ʳ ʳˣ ʳ ʳ ʳ ʳ ʳ ʳʻ ʳ ʳ ʳ ʳˣ ʳ ˁʼʳ ˁ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ˁʳ ʳ ˆˁˆˁ ʳˠ ʳ ʳ ˆˁˆˁ ʳˠ ʳ ʳ ˆˁˆˁ ʳˠ ʳ ʳ ˆˁˆˁ ʳˠ ʳ ʳ ʳ ʳ ʳ ʳ Factory preset modes 15 Preset modes 53 User define modes 16 waiting for supplier input Note 1 Screen displays perfect picture at 15 factory preset modes 2 Screen displays v...

Page 64: ... ʳ ʳ ʳ ˋ ˉ ˌˁ 4 POWER ON LOGO ˇ ˌ ˁ Power On Logo Power On Show up Philips logo 3 seconds Change to input signal This picture is reference only The official drawing will send out by PM 5 Audio Selection Stand alone On Isolate video and audio control input Stand alone Off Integrate video and audio control input Mute On Turn off audio Mute Off Turn on audio 3 4 Horizontal scanning Sync polarity Posi...

Page 65: ...D Blinking 3 sec on 3sec off 3 s DC Power Off N A 1 W LED Off 3 8 Analog Display identification In accordance with VESA Display Channel Standard Ver 1 0 and DDC 2B capability 3 9 DVI D Display identification In accordance with DVI requirement DDWG digital Visual Interface revision 1 0 use DDC 2B DDC CI and EDID V1 3 3 10 USB Plug support Connect the upstream port of the monitor to host PC s USB po...

Page 66: ... ʳ ʳ ʳ ʳ ʳˀˀ ˀˀ ˀˀ ˀˀ ʳ ʳ ʳʻ ʼ ʳ ʳ ʳʻ ʼ ʳ ʳ ʳʻ ʼ ʳ ʳ ʳʻ ʼʳ ʳ ʳ ʳʻˡ ʳ ʳ ʳ ʻˡ ʳ ʳ ʳ ʻˡ ʳ ʳ ʳ ʻˡ ʳ ʳ ʳ ˇ ˋʳ ˇ ˋʳ ˇ ˋʳ ˇ ˋʳʼ ʼ ʼ ʼʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳʳ DCR function ON contrast Њ 2X original contrast specification 3 15 Smart contrast Dynamic contrast ratio Smart Contrast is a kind of dynamic backlight control This function changes the panel backlight dynamically according to the frame brightness histogram ...

Page 67: ...s after user last action Or user can also press MENU to close the Smart Image OSD immediately D Except using MENU button to scroll down profile If Smart Image OSD already launched onscreen User is allowed to use up down key to choose profile and press MENU to confirm selection and close the Smart Image OSD E If the model has multiple inputs including VGA and DVI each input has their own set of pro...

Page 68: ... to another profile and then go back The setting in main OSD will show preset values of that SmartImage profile enabled 3 16 1 6 Profile Definitions system integrators to input at design stages A Office Work i Purpose Design for general office application like word processing Spreadsheet and email The screen is dominated by text ii Enhancement point 1 A little sharpness for increasing the details ...

Page 69: ...gn for image viewing application especially in slide show The screen is dominated by picture Powerpoint presentation could use this profile also ii Enhancement Point 1 Dynamic contrast enhancement by histogram analysis DLC should be off 2 Sharpness and color to be enhanced 75 3 Color temperature 6500 K 4 Brightness level sets to maximum 5 Smart Response set to Off N A for this model 6 Smart Contra...

Page 70: ...ce ii There is OSD showing SmartImage On in left frame and SmartImage Off in right frame iii The OSD word color is white with transparent background C The demo profile will be entertainment profile setting D Hot keys to trigger Press SmartImage 3 seconds or more to trigger the demo mode When demo mode is On press 3 seconds or more to turn off the demo mode When the demo mode is enabled the blue LE...

Page 71: ...ux 5 Ambient temperature 20 5 C 4 2 Brightness To follow Panel specification 4 3 Image size Actual display size ˈ ˋˁˇʳ ʳˆ ˇʳmm 4 4 Brightness uniformity Set contrast at 100 and turn the brightness at 100 Apply the Fig 1 it should comply with the following formula B_min X 100 75 B_max Where B_max Maximum brightness B_min Minimum brightness 4 5 Check Cross talk S Apply Pattern 2 Set contrast and bri...

Page 72: ...angle diagram x y coordinate for the screen center should be Product spec 9300K CIE coordinates X 0 2 3 0 02 Y 0 297 0 02 6500K sRGB CIE coordinates X 0 313 0 02 Y 0 329 0 02 sRGB CIE coordinates X 0 313 0 02 Y 0 329 0 02 Production alignment spec 9300K CIE coordinates X 0 2 3 0 006 Y 0 297 0 006 6500K sRGB CIE coordinates X 0 313 0 006 Y 0 329 0 006 sRGB CIE coordinates X 0 313 0 006 Y 0 329 0 00...

Page 73: ...ns RoHS required WEEE required Resin type selection refer to Project Book Section 7 2 Plastic material 5 9 If paint is used RoHS required WEEE require If new painting type need to implement refer to UN D 1235 ʳ ʳ ʳ ʳ 5 10 Plastic mold tooling ʳ ʳ ʳ ʳ Tooling to be designed to minimize cosmetic defects induced by molding process sink blush weld lines gate marks ejector marks etc Refer to TYV61 9000...

Page 74: ...fer to UN D249 UN D 600 20 gloss units 5 13 Tilt and swivel base Tilt angle 3 5 1 5 1 5 forward 21 5 1 5 1 5 backward Swivel angle ʳˇˈ High Adjustment total 130mm Portrait Display 0 90 CW direction ʳ ʳʳʳʳʳʳʳʳʳ ʳ ʳ ʳ 5 14 Kensington Lock ʳ Must meet Kensington_slot spec TYE M0004 MMD request metal plate in Kensington hole 5 15 Label Regulatory label Carton label should follow Philips requirement Ch...

Page 75: ...cushion material shall be constructed using EPS material The doggy hole is requested 5 17 2 Transportation Test Overall tests refer to UAN D1534 00 01 02 Vibration drop test should be performed at ambient temperature 20 C to 23o C and relative humidity 40 to 65 A Transportation test specification for all regions Package test 1 Random Vibration test 2 Drop test 3 Cold Drop test for design reference...

Page 76: ... Truck loading Transportation request for EU A Land 45 Truck and Trailer 00X1200mm pallet Truck loading B Land 45 Truck and Trailer 1000X1200mm pallet for UK ʳ ʳ ˉ ˉ ˉ ˉ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ The following sections define the interference and susceptibility condition limits that might occur between external environment and the display device ˉˁ ˉˁ ˉˁ ˉˁ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ...

Page 77: ... ʳ According to IEC 01 2 for ESD disturbances ˉˁˇ ˉˁˇ ˉˁˇ ˉˁˇ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ˊ ˊ ˊ ˊ ʳ ʳ ʳ ʳ ʳ ˊˁ ˊˁ ˊˁ ˊˁ ˠ ʳ ʳ ʳ ˠ ʳ ʳ ʳ ˠ ʳ ʳ ʳ ˠ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ System MTBF Including the LCD panel and CCFL 50 000 hrs ˋ ˋ ˋ ˋ ˤ ʳ ʳ ˤ ʳ ʳ ˤ ʳ ʳ ˤ ʳ ʳ ʳ ʳ ʳ ʳ ˋˁ ˋˁ ˋˁ ˋˁ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ ʳ According to MIL STD 1916D Control III level AQL NA Please also refer to annual quality agreement ...

Page 78: ... pixel 0 Distance between two bright dots 15mm Bright dot defects within 20 mm circle 0 Total bright dot defects of all type 3 BLACK DOT DEFECTS ACCEPTABLE LEVEL MODEL 240PW9 1 dark sub pixel 5 2 adjacent dark sub pixels 2 3 adjacent dark sub pixels one white pixel 1 Distance between two black dots 15mm Black dot defects within 20 mm circle 1 Total black dot defects of all type 5 TOTAL DOT DEFECTS...

Page 79: ...ʳ ˇ ˣ ˌʳʳ ʳʳˊˌʳ General Product Specificationʳ ʳʳʳʳ ʳʳʳʳ ʳʳʳʳ ʳʳʳʳʳ ʳ ʳ ʳ ʳ ʳʳ ʳʳ ʳʳ ʳʳʳ ʳ ʳ ʳ Fig 1 Measurement locations of Brightness Uniformity ...

Page 80: ...ˋ ʳʳʳ ˇ ˣ ˌʳʳ ʳ General Product Specification Fig 2 Cross talk pattern Gray level 46 64 Gray level YA 1 2 1 2 1 6 Fig 3 Cross talk Pattern Center at Gray level 0 Black YB 1 2 1 2 1 6 1 3 1 3 1 3 1 3 1 3 ...

Page 81: ... ˇ ˣ ˌʳʳ ʳʳˋ ʳ General Product Specificationʳ ʳʳʳʳ ʳʳʳʳ ʳʳʳʳ ʳʳʳʳʳ ʳ ʳ ʳ ʳ D VIDEO C E SEPARATE SYNC HORIZONTAL B A R VIDEO Q S P O D VIDEO C E B A VERTICAL HORIZONTAL COMPOSITE SYNC FIG 4 TIMING CHART 1 ...

Page 82: ...82 240PW9 LCD 1 10 17 3 8 13 7 12 4 18 2 11 5 14 22 15 16 20 6 19 21 23 9 Exploded View ...

Page 83: ...mponents Model 2 4 0 P W 9 E S 0 0 2 4 0 P W 9 E B 0 0 2 4 0 P W 9 E B 6 9 2 4 0 P W 9 E B 2 7 2 4 0 P W 9 E B 7 5 Location Description PCM code Philips 12NC LPL LPL LPL LPL LPL Remark IC601 IC PWM CURRENT NCP1203P60G 8P 0D 01203 101 996510007138 V V V V V Power controller IC IC851 IC PWM CTRL TL1451ACN DIP 16P 0D 01451 070 996510019040 V V V V V DC to DC controller IC IC651 IC TRANSITION CTRL L65...

Page 84: ...11 996510019248 LCDM LM240W U4 S LA1 P LPL 2 5E 0JU01 001 996510019210 MAIN I F BOAR D AS S Y 3 5E 0JU02 001 996510019211 POW E R BOAR D AS S Y 4 6K 0JS 13 001 996510019238 AS S Y CTR L BD FFC CABLE 5 6K 0JS 14 001 996510019239 AS S Y LE D BD FFC CABLE 6 5E 0JU15 001 996510019232 US B BD ...

Page 85: ...ucker see Fig 1A While holding the SMD with a pair of tweezers take it off gently using the soldering iron s heat applied to each terminal see Fig 1 B Remove the excess solder on the solder lands by means of litz wire or a solder sucker see Fig 1C 1 3 Caution on removal When handling the soldering iron use suitable pressur e and be careful When removing the chip do not use undue force with the pai...

Page 86: ...me hours around 90 for drying Take attention for ESD protection 5 Rework on BGA Ball Grid Array ICs General Although LF BGA assembly yields are very high there may still be a requirement for component rework By rework we mean the process of removing the component from the PWB and replacing it with a new component If an LF BGA is removed from a P WB the solder balls of the component are deformed dr...

Page 87: ...87 240PW9 LCD Repair Flow Chart Power Board Bad Power Board OK NG OK OK Check Scaler Board Bad Scaler Board OK OK ...

Page 88: ...88 240PW9 LCD Repair Flow Chart Check Power Board OK Check LCD Panel OK NO OK Control Board OK OK Board 18V 12V 5V DC ...

Page 89: ...85 220BW8 plus LCD Repair Flow Chart Check Power Board OK Check LCD Panel OK NO OK Control Board OK OK Board 18V 12V 5V DC 89 240PW9 LCD ...

Page 90: ...st duration for Quality Control Inspector must be 1 minute 2 2 2 The test voltage must be maintained within the specified voltage 5 2 2 3 There must be no breakdown during the test 2 2 4 The grounding blade or pin of mains plug must be conducted with accessible metal parts 3 Equipments and Connection 3 1 Equipments For example Zentech 9032 PROGRAMMABLE AUT O SAFETY TESTER 3 2 Connection 4 Recordin...

Page 91: ...Service tool Hardware PCM code 12NC 5E L8215 001 996510019769 240PW9 LCD 91 ...

Page 92: ...Service tool Software FW writing tool RTD tool V6 3 DDC writing tool Q EDID V16 92 240PW9 LCD ...

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